mc68336 Freescale Semiconductor, Inc, mc68336 Datasheet - Page 36

• Manufacturer Part Number: mc68336
• Description: An Introduction To The Mc68331 And Mc68332
• Manufacturer: Freescale Semiconductor, Inc

4.2.9 General-Purpose I/O Ports
Certain SIM pins can be configured as general-purpose I/O ports when not used for other purposes. Port E
pins share function with bus-control signals, port F pins share function with interrupt request signals, and
port C (output only) pins share functions with chip-select signals. The ports are controlled by pin assignment
registers (CSPAR, PEPAR, and PFPAR) and data direction registers (DDRE and DDRF). Pin assignment
registers determine whether a pin is used for general-purpose I/O or for another function. Data direction reg-
isters determine whether an I/O pin is an input or an output. Data is written to and read from the port data
registers (PORTC, PORTE and PORTF).
4.2.10 Example of SIM Initialization
The following example is in the file “sim_init.asm” in the archive “331_2ini.zip” on the Freeware Data Sys-
tem. It can be assembled with the IASM32 assembler.
This example initializes the periodic interrupt timer and chip selects CS0, CS1, and CS2. The program ini-
tializes two 32K x 8 RAM chips using the chip selects. The memory will start at address $30000 and will be
both byte and word readable and writable. This program assumes that the RAM chips have access times
of 85 ns and require no wait states. The DSACK field of the CSOR registers may need to be adjusted for
chips that have faster or slower access times. The hardware configuration should be similar to Figure 13b
shown earlier in this tutorial in the section “Connecting Memory and Peripherals.” However, if you are load-
ing this program into memory using a debugger, CSBOOT must be connected to RAM instead of ROM. If
CSBOOT is connected to ROM (this is the case on the M68332EVK), this code cannot be executed. Either
comment out the section that initializes the chip selects, or use a BDM debugger such as M68ICD32. In this
case, manually change the registers by using the memory modify (mm.w) command.
To run this program on the M68MEVB331/332, do the following:
This code cannot be run “as-is” on an MC68331/332 EVK since CSBOOT is connected to ROM instead of
RAM. CPU32Bug initializes CS0, CS1, and CS2 to select memory beginning at $000000 and maps the boot
ROM higher in memory.
36
1. Assign port pins by writing to pin assignment registers.
2. Program the data direction registers to assign input or output function to port pins.
3. Use the port data registers to read/write data.
• Disable the PRU (W5) in order to use CS2.
• Disconnect jumpers W8 and W11.
• Physically connect J13 pin nine (CS1) to pin two of W11.
• Physically connect J12 pin 19 (CS2) to pin two of W8.
• Place RAM in sockets U1 and U3 and adjust the associated jumpers if necessary.
H. AVEC — This field determines whether a chip-select circuit generates an autovector in response
#SIZING_ON
INITSYS:
INITCS:
to an IACK initiated by the assertion of an IRQ pin. For normal bus cycles, this field is not used. If
a chip-select circuit is to be used to generate an IACK signal, program this field to zero to disable
autovector generation. If a chip-select is to be used to generate an autovector, program this field
to one.
INCLUDE
INCLUDE
INCLUDE
ORG
CLR.L
MOVEC
MOVE.L
MOVE.B
CLR.B
Freescale Semiconductor, Inc.
For More Information On This Product,
'equ332.asm'
'init_res.asm';include reset vector
'init_int.asm';include interrupt vectors
$400
D0
D0,VBR
#$30000,A0
#$7F,SYNCR
SYPCR
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;set system clock to 16.78 MHz
;disable software watchdog
;equates (for MC68331, choose ‘equ331.asm’)
;begin program at $400, immediately after
;the exception table
;make sure that VBR is initialized to zero
;it is initialized to 0 out of reset
;init A0 to point to first RAM location
M68331/332TUT/D
MC68331/332