at85c51snd3b ATMEL Corporation, at85c51snd3b Datasheet - Page 227

• Manufacturer Part Number: at85c51snd3b
• Description: Single-chip Digital Audio Decoder - Encoder With Usb 2.0 Interface
• Manufacturer: ATMEL Corporation

Bit Rate
7632C–MP3–11/06
When the AT85C51SND3B is the only slave on the bus, it can be useful not to use SS
pin and get it back to I/O functionality. This is achieved by setting SSDIS bit in SPCON.
This bit has no effect when CPHA is cleared (see Section "SS Management",
page 228).
Figure 118. SPI Slave Mode Block Diagram
Note:
In master mode, the bit rate can be selected from seven predefined bit rates using the
SPR2, SPR1 and SPR0 control bits in SPCON according to Table 251. These bit rates
are derived from the peripheral clock (F
detailed in Section "Clock Controller", page 28.
In slave mode, the maximum baud rate allowed on the SCK input is limited to FOSC ÷ 4.
Table 251. Serial Bit Rates
Notes:
MISO/P3.0
MOSI/P3.1
SPR2 SPR1 SPR0
SCK/P3.2
0
0
0
0
1
1
1
1
SS/P3.3
MSTR bit in SPCON is cleared to select slave mode.
1. These frequencies are achieved in X1 mode, F
2. These frequencies are achieved in X2 mode, F
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
SPCON.5
SSDIS
46.875
187.5
93.75
3000
1500
750
375
6
(1)
-
4000
2000
1000
62.5
500
250
125
8
(1)
-
SPCON.2
CPHA
Bit Rate (kHz) Vs F
156.25
78.125
312.5
5000
2500
1250
10
625
Clock Logic
-
(1)
Control
and
PER
SPCON.3
12
) issued from the Clock Controller block as
CPOL
187.5
93.75
6000
3000
1500
750
375
(1)(2)
-
PER
8000
4000
2000
1000
16
500
250
125
(MHz)
PER
PER
-
(2)
AT85C51SND3B
I
= F
= F
SPSCR.4
SPSCR.6
SPSCR.7
SPSCR.3
UARTM
MODF
SPSCR.2
SPTE
SPIF
OVR
156.25
10000
OSC
OSC
312.5
5000
2500
1250
20
625
8-bit Shift Register
-
(2)
.
÷ 2.
12000
187.5
6000
3000
1500
24
SPDAT WR
750
375
SPDAT RD
-
(2)
F
PER
Reserved
Q
128
Divider
16
32
64
2
4
8
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