at85c51snd3b ATMEL Corporation, at85c51snd3b Datasheet - Page 34

• Manufacturer Part Number: at85c51snd3b
• Description: Single-chip Digital Audio Decoder - Encoder With Usb 2.0 Interface
• Manufacturer: ATMEL Corporation

Registers
34
AT85C51SND3B
Table 31. CKCON Register
CKCON (0.8Fh) – Clock Control Register
Reset Value = 0000 0000b
Number
4-3
Bit
7
7
6
5
2
1
0
-
Mnemonic Description
OSCAMP
OSCF1:0
WDX2
WDX2
T1X2
T0X2
Bit
X2
6
-
Reserved
The value read from this bit is always 0. Do not set this bit.
Watchdog Clock Control Bit
Set to select the oscillator clock divided by 2 as watchdog clock input (X2
independent).
Clear to select the peripheral clock as watchdog clock input (X2 dependent).
Oscillator Amplifier Control Bit
Set to optimize power consumption by disabling the oscillator amplifier when an
external clock is used.
Clear to enable the oscillator amplifier in case of crystal usage (default).
Oscillator Frequency Range Bits
Set this bits according to Table 23 to optimize power consumption.
Timer 1 Clock Control Bit
Set to select the oscillator clock divided by 2 as timer 1 clock input (X2
independent).
Clear to select the peripheral clock as timer 1 clock input (X2 dependent).
Timer 0 Clock Control Bit
Set to select the oscillator clock divided by 2 as timer 0 clock input (X2
independent).
Clear to select the peripheral clock as timer 0 clock input (X2 dependent).
System Clock Control Bit
Clear to select 12 clock periods per machine cycle (STD mode, F
F
Set to select 6 clock periods per machine cycle (X2 mode, F
OSCAMP
OSC
/
5
2).
OSCF1
4
OSCF0
3
T1X2
2
T0X2
1
CPU
= F
7632C–MP3–11/06
CPU
PER
= F
= F
X2
0
OSC
PER
).
=