tza3015hw NXP Semiconductors, tza3015hw Datasheet - Page 35

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tza3015hw

Manufacturer Part Number
tza3015hw
Description
30 Mbit/s To 3.2 Gbit/s A-rate 4-bit Fibre Optic Transceiver
Manufacturer
NXP Semiconductors
Datasheet

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Philips Semiconductors
Note to Table 24
1. Signal is not processed by the interrupt controller.
Table 25 Register REFDIV (address: A1h, default value: 00h)
Table 26 Register LOOPMODE (address: A3h, default value: 67h)
2003 Dec 16
7
1
0
0
7
30 Mbit/s to 3.2 Gbit/s A-rate
4-bit fibre optic transceiver
6
1
0
0
6
5
1
0
0
5
4
0
4
x
BIT
BIT
3
1
0
0
3
2
0
0
0
0
1
1
0
2
0
0
0
0
1
1
1
1
1
0
1
0
0
1
1
0
0
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
0
0
1
0
1
0
1
0
1
reference frequency division ratio divider R; octave
selection
reference frequency division programming by I
high gain clean-up PLL
invert charge pump currents of the clean-up PLL
enable clean-up PLL
loop mode selection
R = 1
R = 2
R = 4
R = 8
R = 16
R = 32
enable I
enable programming by pins
enable high gain
normal gain
clean-up PLL inverted
clean-up PLL normal operating
clean-up PLL enabled
clean-up PLL disabled (except in clean-up loop
back mode)
normal mode
line loop back mode
diagnostic loop back mode
reserved
reserved
serial loop timing mode
clean-up loop back mode
normal mode
2
C-bus programming
35
DESCRIPTION
DESCRIPTION
PARAMETER
PARAMETER
2
C-bus I2CFREF
Preliminary specification
TZA3015HW
default value
FREFI2C[2:0]
reserved
CLUPPLLHG
CLUPPLLINV
CLUPPLLEN
LM[2:0]
NAME
NAME

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