tza3015hw NXP Semiconductors, tza3015hw Datasheet - Page 8

• Manufacturer Part Number: tza3015hw
• Description: 30 Mbit/s To 3.2 Gbit/s A-rate 4-bit Fibre Optic Transceiver
• Manufacturer: NXP Semiconductors

Philips Semiconductors
FUNCTIONAL DESCRIPTION
The TZA3015HW contains the following main blocks:
General
C
The IC features two types of user interface: I
direct pin programming of eight predefined modes. The
mode selection is set by pin UI.
The I
enabled if pin UI is left open-circuit or connected to V
(see Table 1). If pin UI is connected to V
pre-programmed modes can be selected with pins
CS(DR0), SDA(DR1) and SCL(DR2).
Table 1 Truth table for pin UI
I
In I
SDA and SCL. Pin CS has to be HIGH during the I
read or write actions. When pin CS is made LOW, the
programmed configuration remains active, but signals
SDA and SCL are ignored. In this way, all ICs in the
application with the same I
TZA3015HWs) are individually accessible.
The I
Table 2 Device address of the TZA3015HW
After power-up, the TZA3015HW initiates a Power-On
Reset (POR) sequence to restore the default settings of
the I
Table 21 for the defaults and a detailed list of all I
registers and the meaning of their contents.
2003 Dec 16
2
ONFIGURATION
HIGH
C-
LOW
A6
General part: configuration via I
pre-programmed mode
Receiver part: limiting amplifier, data and clock recovery
and demultiplexer
Transmitter part: clock synthesizer and multiplexer.
30 Mbit/s to 3.2 Gbit/s A-rate
4-bit fibre optic transceiver
1
2
UI
BUS MODE
C-bus mode the IC can be configured by using pins
2
2
2
C-bus registers, regardless of the user interface. See
C-bus mode is operational and A-rate functionality is
C-bus address is given in Table 2.
A5
pre-programmed
I
2
0
C-bus
DEVICE ADDRESS BITS
MODE
A4
1
A3
0
2
C-bus address (e.g. other
PIN 22
A2
DR0
1
CS
2
C-bus mode or
A1
0
PIN 23
EE
DR1
SDA
, the eight
2
C-bus or
A0
0
2
PIN 24
2
C-bus
DR2
SCL
C-bus
R/W
CC
X
8
Some functions of the TZA3015HW can be controlled both
using pre-program mode and via the I
cases, an extra I
available to set the programming precedence to
pre-programmed or I
pre-programmed).
P
The TZA3015HW is primarily intended to be programmed
via the I
application, the TZA3015HW can be used in the
pre-programmed mode (pin UI = LOW), with reduced
functionality. The TZA3015HW functions that are
accessible in the pre-programmed mode and their
associated pins are:
RE
All pre-programmed modes are supported by one single
reference frequency
The redefined pins DR0 to DR2 act as standard CMOS
inputs that select any of the desired data rates; see
Table 3
Transceiver mode (transceiver, transmitter, receiver,
off) (ENRX and ENTX)
Enable serial clock output (ENTXSC)
Loss of signal threshold setting (LOSTH)
Select loop mode (LM0 to LM2)
Automatic byte alignment for SDH/SONET or Gigabit
Ethernet (ENBA)
Frame detection for SDH/SONET or Gigabit Ethernet
Even parity generation (PAREVEN)
In window detection (INWINDOW)
Sizeable frequency window: 1000 or 0 ppm (WINSIZE)
Temperature alarm (INT, open drain)
Co-directional or contra-directional clocking scheme
(CLKDIR)
Enable DDR for both receiver and transmitter (ENDDR)
CML serial RF outputs with typical 300 mV (p-p)
single-ended signal (DC-coupled load)
Loss of lock detection (LOL)
FIFO overflow indication (OVERFLOW)
FIFO reset (FIFORESET)
Supported reference frequencies: 19.44, 38.88, 155.52
and 622.08 MHz.
-
PROGRAMMED MODE
2
C-bus. If no I
2
C-bus bit called I2C<pinname> is
2
C-bus bit (default is selection by
2
C-bus control is present in the
Preliminary specification
TZA3015HW
2
C-bus. In these