tmp89fm82t TOSHIBA Semiconductor CORPORATION, tmp89fm82t Datasheet - Page 309

• Manufacturer Part Number: tmp89fm82t
• Description: 8 Bit Microcontroller
• Manufacturer: TOSHIBA Semiconductor CORPORATION

19.4.1
controlled by timer control registers (MTCRA, MTCRB) and timer compare registers (CMP1, CMP2, CMP3).
The timer unit consists mainly of a mode timer, three timer comparator, and mode capture register, and is
Configuration of the Timer Unit
・ The mode timer can be reset by a signal from the position detection circuit, Timer 3, or overload
・ The mode timer value during counting can be read by capturing the count value by (MTCRB<SWCP>)
・ Timer 1 generate an interrupt signal by magnitude comparison and Timers 2 , 3 by matching compar-
・ Timers 1 to 3 interupt request (INTTMR1 to 3) are not continuously generated, because those signal
・ When capturing by position detection is enabled (MTCRB<PDCCP>="1") , the capture register
protective circuit. If the mode timer overflows without being reset, it stops at 0xFFFF and sets an
overflow flag in (MTCRB<TMOF>).
bit set in software and reading the capture register (MCAP).
ison, respectively. Therefore, Timer 1 can generate an interrupt signal even when it could not write to
the compare register in time and the counter value at the time of writing happens to exceed the register’s
set value.
inhibit next interrupt requesst generation. To enable the next interrupts, it is necessary to write a new
value to the registers (CMP1,CMP2,CMP3).
(MCAP) has the timer value captured each position detect cycle. In this way, the capture register always
holds the latest value.
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