tmp89fm82t TOSHIBA Semiconductor CORPORATION, tmp89fm82t Datasheet - Page 34

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tmp89fm82t

Manufacturer Part Number
tmp89fm82t
Description
8 Bit Microcontroller
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
2.3
System clock controller
RA000
Warm-up counter control register
Warm-up counter data register
Clock gear control register
(0x0FCD)
(0x0FCE)
(0x0FCF)
WUCCR
WUCDR
CGCR
Note 1: fc: High-frequency clock [Hz], fs: Low-frequency clock [Hz]
Note 2: WUCCR<WUCRST> is cleared to "0" automatically, and need not be cleared to "0" after being set to "1".
Note 3: Bits 7 to 4 of WUCCR are read as "0". Bit 0 is read as "1".
Note 4: Before starting the warm-up counter operation, set the source clock and the frequency division rate at WUCCR<WUCDIV,
Note 1: Don't start the warm-up counter operation with WUCDR set at "0x00".
Note 1: fcgck: Gear clock [Hz], fc: High-frequency clock [Hz]
Note 2: Don't change CGCR<FCGCKSEL> in the SLOW mode.
Note 3: Bits 7 to 2 of CGCR are read as "0".
FCGCKSEL
WUCRST
WUCSEL
WUCDIV
WUCDR
Read/Write
Read/Write
Read/Write
Bit Symbol
Bit Symbol
Bit Symbol
After reset
WUCSEL> and set the warm-up time at WUCDR.
After reset
After reset
Resets and stops the warm-up coun-
ter
Selects the frequency division of the
warm-up counter source clock
Selects the warm-up counter source
clock
Clock gear setting
WUCRST
W
R
7
0
7
0
7
0
-
R
R
6
0
6
1
6
0
-
-
R
R
5
0
5
1
5
0
00 :
01 :
10 :
11 :
00 :
01 :
10 :
11 :
-
-
Page 18
0 :
1 :
0 :
1 :
-
Clear and stop the counter
Source clock
Source clock / 2
Source clock / 2
Source clock / 2
Select the high-frequency clock (fc)
Select the low-frequency clock (fs)
fcgck = fc / 4
fcgck = fc / 2
fcgck = fc
Reserved
Warm-up time setting
R
R
4
0
4
0
4
0
-
-
WUCDR
R/W
2
3
R
3
1
3
0
3
0
-
WUCDIV
R/W
R
0
2
1
2
1
2
-
WUCSEL
R/W
1
0
1
1
1
0
TMP89FM82T
FCGCKSEL
R/W
0
R
0
0
0
0
1
-

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