tmp89fm82t TOSHIBA Semiconductor CORPORATION, tmp89fm82t Datasheet - Page 57

• Manufacturer Part Number: tmp89fm82t
• Description: 8 Bit Microcontroller
• Manufacturer: TOSHIBA Semiconductor CORPORATION

RA000
Figure 2-15 Switching the Main System Clock (fm) (Switching from fs/4 to fcgck)
PINTWUC:
VINTWUC:
Quarter of the low-frequency clock
Example : Switching from the SLOW1 mode to the NORMAL1 mode after the stability of the high-frequency clock oscillation
voltage detection circuits. When a reset is released, the warm-up starts. After the warm-up is completed,
the NORMAL1 mode becomes active.
SYSCR2<SYSCK>
Note 1: Be sure to follow this procedure to switch the operation from the SLOW1 mode to the NORMAL1
Note 2: After switching SYSCR2<SYSCK>, be sure to wait for 2 machine cycles or longer before clearing
Note 3: When the main system clock (fm) is switched, the gear clock (fcgck) is synchronized with the clock
Note 4: When P0FC0 is "0", setting SYSCR2<XEN> to "1" causes a system clock reset.
Note 5: When SYSCR2<XEN> is set at "1", writing "1" to SYSCR2<XEN> does not cause the warm-up
The SLOW mode is also released by a reset by the RESET pin, a power-on reset and a reset by the
Gear clock (fcgck)
Main system clock
; #### Initialize routine ####
SET
¦
¦
LD
LD
SET
SET
¦
; #### Interrupt service routine of warm-up counter interrupts ####
CLR
NOP
NOP
CLR
RETI
¦
DW
circuit is confirmed at the warm-up counter (fc = 8 MHz, warm-up time = 4.0 ms)
mode.
SYSCR2<XTEN> to "0". Clearing it within 2 machine cycles causes a system clock reset.
that is a quarter of the basic clock (fs) for the low-frequency clock. For the synchronization, fm is
stopped for a period of 2.5/fcgck [s] or shorter.
counter to start counting the source clock.
(fs/4)
(P0FC).2
(WUCCR), 0x09
(WUCDR), 0x7D
(EIRL). 4
(SYSCR2) .6
(SYSCR2). 4
(SYSCR2). 5
PINTWUC
When the rising edge of fs/4 is
detected twice after SYSCR2<SYSCK>
is changed from 1 to 0, fm is stopped
for synchronization.
Page 41
;P0FC2 = 1 (Uses P02/03 as oscillators)
;WUCCR<WUCDIV> = 10 (Divided by 2)
;WUCCR<WUCSEL> = 0 (Selects fc as the source clock)
;Sets the warm-up time
;(Determine the time depending on the frequency and the oscillator
;characteristics)
;4ms / 32us = 125 → 0x7D
;Enables INTWUC interrupts
;SYSCR2<XEN> = 1
;(Starts the oscillation of the high-frequency clock oscillation circuit)
;SYSCR2<SYSCK> = 0
;(Switches the main system clock to the gear clock)
;Waits for 2 machine cycles
;SYSCR2<XTEN> = 0
;(Turns off the low-frequency clock oscillation circuit)
;INTWUC vector table
2.5/fcgck(max.)
When the rising edge of fcgck is detected
twice after fm is stopped, fm is switched to fcgck.
TMP89FM82T