tmp89fm82t TOSHIBA Semiconductor CORPORATION, tmp89fm82t Datasheet - Page 326

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tmp89fm82t

Manufacturer Part Number
tmp89fm82t
Description
8 Bit Microcontroller
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
19.5
Three-phase PWM Output Unit
19.5.4
Overload protective input CL
Timer 1 interrupt INTTMR1
by driving their respective port inputs EMG1, CL1 active.
This circuit consists of an EMG protective circuit and overload protective circuit. These circuits are activated
PWM synchronizing
clock PWM sync
Overload protective
interrupt INTCLM
Protective Circuit
a. EMG protective circuit
b. Overload protective circuit
Stop MDCNT
the signal on EMG1 input port goes active (negative edge triggered), the six ports are immediately
disabled high-impedance against output and an EMG interrupt request (INTEMG) is generated. The
EMG Control Register (EMGCRA) is used to set EMG protection. If the EMGCRA<EMGST> read
value is “1”, it means that the EMG protective circuit is operating. To return from the EMG protective
state, reset the MDOUT Register bits 11 to 0 to "0" and then set the EMGCRA<RTE> to "1". Returning
from the EMG protective state is effective when the EMG1 protective input pin has been released back
to high level. To disable the EMG function, set data “0x5A“ and “0xA5“ sequentially in the EMG
disable Register (EMGREL) and reset the EMGCRA<EMGEN> to "0". When the EMG function is
disabled, EMG interrupts request (INTEMG) are not generated.
study carefully.
overload protection, set the EMGCRB<CLEN> to "1" to enable the overload protective circuit. The
circuit starts operation when the overload protective input CL1 is pulled low.
manually (EMGCRB<RTCL>). These methods are effective when the overload protective input CL1
has been released back to high level.
This protective circuit is used for emergency stop, when the EMG protective circuit is enabled. When
The EMG protective circuit is initially enabled. In case the usage with disabling it, it is needed to
The overload protective circuit is set by using the EMG Control Registers (EMGCRA/B). To activate
The return from overload state is made following three methods.
return by a timer (EMGCRB<RTTM1>), return by PWM sync (EMGCRB<RTPWM>), or return
Figure 19-17 Configuration of the Protective Circuit
u
x
v
y
w
z
control
Reset
7
2
6, 5
EMGCRB
4
EMG control register
3, 2, 1, 0
CL detection
protective
Overload
control
4
Page 310
7, 6, 5, 4
4
EMGCRA
Under
prote-
ction
2 1 0
protective
control
2
EMG
EMG disable code register
7, 6, 5, 4, 3, 2, 1, 0
8
EMGREL
EMG
EMG input
INTEMG
EMG interrupt
u'
x'
v'
y'
w'
z'
MDOUT
11 to 0
TMP89FM82T
Set "0"

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