dspic33fj128gp204 Microchip Technology Inc., dspic33fj128gp204 Datasheet - Page 205

• Manufacturer Part Number: dspic33fj128gp204
• Description: High-performance, 16-bit Digital Signal Controllers
• Manufacturer: Microchip Technology Inc.

17.0
The Inter-Integrated Circuit (I
complete hardware support for both Slave and Multi-
Master modes of the I
standard, with a 16-bit interface.
The I
• The SCLx pin is clock.
• The SDAx pin is data.
The I
• I
• I
• I
• I
• Serial clock synchronization for I
• I
17.1
The hardware fully implements all the master and slave
functions of the I
specifications, as well as 7 and 10-bit addressing.
The I
master on an I
The following types of I
• I
• I
• I
For details about the communication sequence in each
of these modes, refer to the “dsPIC33F Family
Reference Manual”. Please see the Microchip website
(www.microchip.com) for the latest dsPIC33F Family
Reference Manual chapters.
© 2009 Microchip Technology Inc.
Note:
modes of operation.
master and slaves.
used as a handshake mechanism to suspend and
resume serial transfer (SCLREL control).
collision and arbitrates accordingly.
2
2
2
2
2
2
2
2
C interface supporting both Master and Slave
C Slave mode supports 7 and 10-bit address.
C Master mode supports 7 and 10-bit address.
C Port allows bidirectional transfers between
C supports multi-master operation, detects bus
C slave operation with 7-bit address
C slave operation with 10-bit address
C master operation with 7- or 10-bit address
2
2
2
C module has a 2-pin interface:
C module offers the following key features:
C module can operate either as a slave or a
INTER-INTEGRATED
CIRCUIT™ (I
Operating Modes
This data sheet summarizes the features
of
dsPIC33FJ64GPX02/X04
dsPIC33FJ128GPX02/X04
devices. It is not intended to be a
comprehensive
complement the information in this data
sheet, refer to the “dsPIC33F Family
Reference Manual”, “Section 19. Inter-
Integrated Circuit™ (I
which is available from the Microchip
website (www.microchip.com).
2
C bus.
the
2
C Standard and Fast mode
2
C operation are supported:
2
2
dsPIC33FJ32GP302/304,
C serial communication
C™)
reference
2
C) module provides
2
2
C™)” (DS70195),
C port can be
families
source.
and
Preliminary
To
of
17.2
I2CxCON and I2CxSTAT are control and status
registers, respectively. The I2CxCON register is
readable and writable. The lower six bits of I2CxSTAT
are read-only. The remaining bits of the I2CSTAT are
read/write:
• I2CxRSR is the shift register used for shifting data
• I2CxRCV is the receive buffer and the register to
• I2CxTRN is the transmit register to which bytes
• The I2CxADD register holds the slave address.
• A status bit, ADD10, indicates 10-bit Address
• The I2CxBRG acts as the Baud Rate Generator
In receive operations, I2CxRSR and I2CxRCV together
form a double-buffered receiver. When I2CxRSR
receives a complete byte, it is transferred to I2CxRCV,
and an interrupt pulse is generated.
internal to the module and the user application
has no access to it.
which data bytes are written, or from which data
bytes are read.
are written during a transmit operation.
mode.
(BRG) reload value.
I
2
C Registers
DS70292C-page 203