dspic33fj128gp204 Microchip Technology Inc., dspic33fj128gp204 Datasheet - Page 99

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dspic33fj128gp204

Manufacturer Part Number
dspic33fj128gp204
Description
High-performance, 16-bit Digital Signal Controllers
Manufacturer
Microchip Technology Inc.
Datasheet

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REGISTER 7-7:
© 2009 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12-5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1: Interrupts disabled on devices without ECAN™ modules.
U-0
U-0
Unimplemented: Read as ‘0’
DMA4IF: DMA Channel 4 Data Transfer Complete Interrupt Flag Status bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
PMPIF: Parallel Master Port Interrupt Flag Status bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
Unimplemented: Read as ‘0’
DMA3IF: DMA Channel 3 Data Transfer Complete Interrupt Flag Status bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
C1IF: ECAN1 Event Interrupt Flag Status bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
C1RXIF: ECAN1 Receive Data Ready Interrupt Flag Status bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
SPI2IF: SPI2 Event Interrupt Flag Status bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
SPI2EIF: SPI2 Error Interrupt Flag Status bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
DMA4IF
R/W-0
U-0
IFS2: INTERRUPT FLAG STATUS REGISTER 2
‘1’ = Bit is set
W = Writable bit
PMPIF
R/W-0
U-0
DMA3IF
R/W-0
U-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
(1)
C1IF
R/W-0
U-0
(1)
C1RXIF
R/W-0
(1)
U-0
(1)
x = Bit is unknown
SPI2IF
R/W-0
U-0
DS70292C-page 97
SPI2EIF
R/W-0
U-0
bit 8
bit 0

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