dspic33fj128gp204 Microchip Technology Inc., dspic33fj128gp204 Datasheet - Page 26

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dspic33fj128gp204

Manufacturer Part Number
dspic33fj128gp204
Description
High-performance, 16-bit Digital Signal Controllers
Manufacturer
Microchip Technology Inc.
Datasheet

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3.4
The dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/
X04 and dsPIC33FJ128GPX02/X04 features a 17-bit
by 17-bit single-cycle multiplier that is shared by both
the MCU ALU and DSP engine. The multiplier can per-
form signed, unsigned and mixed-sign multiplication.
Using a 17-bit by 17-bit multiplier for 16-bit by 16-bit
multiplication not only allows you to perform mixed-sign
multiplication, it also achieves accurate results for
special operations, such as (-1.0) x (-1.0).
FIGURE 3-1:
DS70292C-page 24
PSV and Table
Control Block
Data Access
Program Memory
Address Latch
Special MCU Features
Data Latch
23
23
Controller
Interrupt
23
dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04 AND dsPIC33FJ128GPX02/
X04 CPU CORE BLOCK DIAGRAM
to Various Blocks
Control Signals
Control
Decode and
Instruction
Stack
Logic
PCU
Program Counter
Control
24
8
PCH
Control
Logic
Loop
16
PCL
Preliminary
16
Y Data Bus
X Data Bus
Divide Support
DSP Engine
Instruction Reg
Data Latch
ROM Latch
Address Generator Units
Address
X RAM
Latch
16
16
The dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/
X04 and dsPIC33FJ128GPX02/X04 supports 16/16
and 32/16 divide operations, both fractional and inte-
ger. All divide instructions are iterative operations. They
must be executed within a REPEAT loop, resulting in a
total execution time of 19 instruction cycles. The divide
operation can be interrupted during any of those
19 cycles without loss of data.
A 40-bit barrel shifter is used to perform up to a 16-bit
left or right shift in a single cycle. The barrel shifter can
be used by both MCU and DSP instructions.
Data Latch
Address
Y RAM
Latch
EA MUX
W Register Array
16
16
16
16 x 16
16
16-bit ALU
© 2009 Microchip Technology Inc.
16
Controller
16
DMA
RAM
DMA
16
To Peripheral Modules
16

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