at91sam9g20-cu ATMEL Corporation, at91sam9g20-cu Datasheet - Page 105

• Manufacturer Part Number: at91sam9g20-cu
• Description: At91 Arm Thumb Microcontrollers
• Manufacturer: ATMEL Corporation

16. Periodic Interval Timer (PIT)
16.1
16.2
Figure 16-1. Periodic Interval Timer
16.3
6384B–ATARM–15-Dec-08
Prescaler
MCK
Overview
Block Diagram
Functional Description
MCK/16
The Periodic Interval Timer (PIT) provides the operating system’s scheduler interrupt. It is
designed to offer maximum accuracy and efficient management, even for systems with long
response time.
The Periodic Interval Timer aims at providing periodic interrupts for use by operating systems.
The PIT provides a programmable overflow counter and a reset-on-read feature. It is built
around two counters: a 20-bit CPIV counter and a 12-bit PICNT counter. Both counters work at
Master Clock /16.
The first 20-bit CPIV counter increments from 0 up to a programmable overflow value set in the
field PIV of the Mode Register (PIT_MR). When the counter CPIV reaches this value, it resets to
0 and increments the Periodic Interval Counter, PICNT. The status bit PITS in the Status Regis-
ter (PIT_SR) rises and triggers an interrupt, provided the interrupt is enabled (PITIEN in
PIT_MR).
Counter
0
CPIV
CPIV
20-bit
0
1
PIT_PIVR
PIT_PIIR
PIT_MR
= ?
PIV
AT91SAM9G20 Preliminary
0
0
PICNT
Adder
12-bit
PICNT
1
PIT_SR
read PIT_PIVR
PITS
set
reset
PIT_MR
PITIEN
pit_irq
105