at91sam9g20-cu ATMEL Corporation, at91sam9g20-cu Datasheet - Page 284
at91sam9g20-cu
Manufacturer Part Number
at91sam9g20-cu
Description
At91 Arm Thumb Microcontrollers
Manufacturer
ATMEL Corporation
Datasheet
1.AT91SAM9G20-CU.pdf
(814 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT91SAM9G20-CU
Manufacturer:
Atmel
Quantity:
5
Company:
Part Number:
AT91SAM9G20-CU
Manufacturer:
ATMEL
Quantity:
188
- Current page: 284 of 814
- Download datasheet (13Mb)
26.3
26.4
284
Processor Clock Controller
USB Clock Controller
AT91SAM9G20 Preliminary
Figure 26-1. Master Clock Controller
The PMC features a Processor Clock Controller (PCK) that implements the Processor Idle
Mode. The Processor Clock can be disabled by writing the System Clock Disable Register
(PMC_SCDR).The status of this clock (at least for debug purpose) can be read in the System
Clock Status Register (PMC_SCSR).
The Processor Clock PCK is enabled after a reset and is automatically re-enabled by any
enabled interrupt. The Processor Idle Mode is achieved by disabling the Processor Clock, which
is automatically re-enabled by any enabled fast or normal interrupt, or by the reset of the
product.
When the Processor Clock is disabled, the current instruction is finished before the clock is
stopped, but this does not prevent data transfers from other masters of the system bus.
The PMC contains a Processor Clock divider which allows the processor clock to be divided
independently of the Master Clock divider setting. The Processor Clock divider can be pro-
grammed through the PDIV field in PMC_MCKR.
The USB Source Clock is always generated from the PLL B output. If using the USB, the user
must program the PLL to generate a 48 MHz or a 96 MHz signal with an accuracy of ± 0.25%
depending on the USBDIV bit in CKGR_PLLBR (see
When the PLL B output is stable, i.e., the LOCKB is set:
• The USB host clock can be enabled by setting the UHP bit in PMC_SCER. To save power on
this peripheral when it is not used, the user can set the UHP bit in PMC_SCDR. The UHP bit
in PMC_SCSR gives the activity of this clock. The USB host port require both the 12/48 MHz
signal and the Master Clock. The Master Clock may be controlled via the Master Clock
Controller.
MAINCK
PLLACK
PLLBCK
SLCK
PMC_MCKR
CSS
PMC_MCKR
Master Clock
Prescaler
PRES
Figure
PMC_MCKR
PMC_MCKR
Processor
Master
Divider
Divider
Clock
Clock
26-2).
MDIV
PDIV
MCK
To the Processor
Clock Controller (PCK)
6384B–ATARM–15-Dec-08
Related parts for at91sam9g20-cu
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
INTERVAL AND WIPE/WASH WIPER CONTROL IC WITH DELAY
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
Low-Voltage Voice-Switched IC for Hands-Free Operation
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
MONOLITHIC INTEGRATED FEATUREPHONE CIRCUIT
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
AM-FM Receiver IC U4255BM-M
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
Monolithic Integrated Feature Phone Circuit
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
Multistandard Video-IF and Quasi Parallel Sound Processing
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
High-performance EE PLD
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
8-bit Flash Microcontroller
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
2-Wire Serial EEPROM
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
U6046BREAR WINDOW HEATING TIMER / LONG-TERM TIMER
Manufacturer:
ATMEL Corporation
Datasheet: