at91sam9g20-cu ATMEL Corporation, at91sam9g20-cu Datasheet - Page 776

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at91sam9g20-cu

Manufacturer Part Number
at91sam9g20-cu
Description
At91 Arm Thumb Microcontrollers
Manufacturer
ATMEL Corporation
Datasheet

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Figure 41-4. SMC Timings - NRD Controlled Read and NWE Controlled Write
41.10 SDRAMC Timings
776
A0/A1/NBS[3:0]/A2-A25
AT91SAM9G20 Preliminary
D0 - D31
NWE
NRD
NCS
SMC6
SMC5
Timings are given assuming a capacitance load on data, control and address pads :
Table 41-29. Capacitance Load on data, control and address pads
Table 41-30. Capacitance Load on SDCK pad
The SDRAM Controller satisfies the timings of standard PC100, PC133 (3.3V supply) and
Mobile SDRAM (1.8 supply) that are given in
Table 41-31. SDRAM PC100 Characteristics
NRD Controlled READ
IO Supply
3.3V
1.8V
IO Supply
3.3V
1.8V
Parameter
SDRAM Controller Clock Frequency
Control/Address/Data In Setup
Control/Address/Data In Hold
Data Out Access time after SDCK rising
Data Out change time after SDCK rising
with NO HOLD
SMC7
SMC1
SMC2
Corner
MAX
50pF
30 pF
Corner
MAX
10pF
10pF
SMC17
SMC18
NWE Controlled WRITE
with NO HOLD
SMC16
SMC15
(1)(2)
(1)(2)
SMC21
SMC21
SMC21
SMC6
SMC5
NRD Controlled READ
SMC7
with HOLD
Table
SMC3
3.3V Supply
41-31,
SMC4
Min
2
1
3
Table 41-32
SMC17
SMC18
NWE Controlled WRITE
3.3V Supply
and
with HOLD
SMC16
Max
100
6
SMC15
Table
6384B–ATARM–15-Dec-08
SMC19
SMC20
41-33.
SMC19
Units
MHz
ns
ns
ns
ns

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