at91sam9g20-cu ATMEL Corporation, at91sam9g20-cu Datasheet - Page 722

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at91sam9g20-cu

Manufacturer Part Number
at91sam9g20-cu
Description
At91 Arm Thumb Microcontrollers
Manufacturer
ATMEL Corporation
Datasheet

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39.4.1
Register Name: ISI_CR1
Access Type: Read-write
Reset Value: 0x00000002
• ISI_RST: Image Sensor Interface Reset
Write-only. Refer to bit SOFTRST in
0: No action
1: Resets the image sensor interface.
• ISI_DIS: Image Sensor Disable:
0: Enable the image sensor interface.
1: Finish capturing the current frame and then shut down the module.
• HSYNC_POL: Horizontal Synchronization Polarity
0: HSYNC active high
1: HSYNC active low
• VSYNC_POL: Vertical sYnchronization Polarity
0: VSYNC active high
1: VSYNC active low
• PIXCLK_POL: Pixel Clock Polarity
0: Data is sampled on rising edge of pixel clock
1: Data is sampled on falling edge of pixel clock
• EMB_SYNC: Embedded Synchronization
0: Synchronization by HSYNC, VSYNC
1: Synchronization by embedded synchronization sequence SAV/EAV
• CRC_SYNC: Embedded Synchronization
0: No CRC correction is performed on embedded synchronization
722
CODEC_ON
CRC_SYNC
31
23
15
7
AT91SAM9G20 Preliminary
ISI Control 1 Register
EMB_SYNC
30
22
14
6
THMASK
Section 39.4.3 “ISI Status Register” on page 726
29
21
13
5
-
PIXCLK_POL
FULL
28
20
12
4
SFD
SLD
VSYNC_POL
27
19
11
3
-
HSYNC_POL
26
18
10
2
for soft reset status.
ISI_DIS
FRATE
25
17
9
1
6384B–ATARM–15-Dec-08
ISI_RST
24
16
8
0

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