m30833fjgp Renesas Electronics Corporation., m30833fjgp Datasheet - Page 181

• Manufacturer Part Number: m30833fjgp
• Description: Renesas 16/32-bit Single-chip Microcomputer M16c Family / M32c/80 Series
• Manufacturer: Renesas Electronics Corporation.

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Table 14.11 Specifications in Pulse Period/Pulse Width Measurement Mode
NOTES:
2
0
Count Source
Counting Operation
Counter Start Condition
Counter Stop Condition
Interrupt Request Generation Timing • On the valid edge of a pulse to be measured
TBi
Read from Timer
Write to Timer
14.2.3 Pulse Period/Pulse Width Measurement Mode
C
1
9
3 .
B
8 /
In pulse period/pulse width measurement mode, the timer measures pulse period or pulse width of an
external signal. (See Table 14.11) Figure 14.22 shows the TBiMR register (i=0 to 5) in pulse period/pulse
width measurement mode. Figure 14.23 shows an example of an operation timing when measuring a
pulse period. Figure 14.24 shows an example of the pulse width measurement.
IN
0
1
1. No interrupt request is generated when the pulse to be measured is on the first valid edge after the
2. The TBi register is in an indeterminate state until the pulse to be measured is on the second valid
3. The CNT3 to CNT0 bits in the TCSPR register select no division (n=0) or divide-by-2n (n=1 to 15).
3
0
Pin Function
3
J
G
4
a
timer has started counting.
edge after the timer has started counting.
Item
o r
0 -
n
3 .
1
u
, 1
3
p
1
(
2
M
0
0
3
6
2
C
8 /
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• The timer increments a counter value
The TBiS bit (i=0 to 5) in the TABSR or TBSR register is set to "1" (starts counting)
The TBiS bit is set to "0" (stops counting)
• The timer counter overflows
Input for a pulse to be measured
The TBi register indicates reload register values (measurement results)
Value written to the TBi register can be written to neither reload register nor counter
2
1
Counter value is transferred to the reload register on the valid edge of a pulse to be
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measured. It is set to "0000
The MR3 bit in the TBiMR register is set to "1" (overflow) simultaneously. When the
TBiS bit is set to "1" (start counting) and the next count source is counted after setting
the MR3 bit to "1" (overflow), the MR3 bit can be set to "0" (no overflow) by writing to
the TBiMR register.
f o
8 /
8
, f
4
3
8
2n (3)
) T
8
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C32
16
" and the timer continues counting
Specification
(1)
14. Timer (Timer B)
(2)