m30833fjgp Renesas Electronics Corporation., m30833fjgp Datasheet - Page 297

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m30833fjgp

Manufacturer Part Number
m30833fjgp
Description
Renesas 16/32-bit Single-chip Microcomputer M16c Family / M32c/80 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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R
R
M
21.3 Waveform Generation Function
e
E
3
. v
J
2
0
Table 21.7 Pin Settings for Waveform Generation Function (1/2)
NOTES:
Waveforms are generated when the value of the base timer matches the GiPOj register (i=0 to 3; j=0 to 7).
The waveform generation function has the following six modes :
• Single-phase waveform output mode (group 0 to 3)
• Phase-delayed waveform output mode (group 0 to 3)
• Set/Reset waveform output (SR waveform output) mode (group 0 to 3)
• Bit modulation PWM output mode (group 2 and 3)
• Real-time port output (RTP output) mode (group 2 and 3)
• Parallel real-time port output (parallel RTP output) mode (group 2 and 3)
Table 21.7 lists pin settings of the waveform generation function. Table 21.8 lists registers associated with
the waveform generation function.
P6
P7
P7
P7
P7
P7
P7
P7
P8
P8
P9
P11
P11
P11
P11
P12
P12
P12
P12
P12
P12
P12
P12
P13
P13
1
9
C
3 .
B
1. This port is provided in the 144-pin package only.
2. When the CAS bit in the GiBCR1 register is set to "1" (32-bit time measurement function), the OUTC1j pin (j=0 to 7)
8 /
4
0
1
3
4
5
6
7
1
2
2
0
1
/OUTC2
/OUTC2
/OUTC2
/OUTC1
/OUTC1
/OUTC1
/OUTC0
/OUTC0
/OUTC3
/OUTC3
/OUTC2
0
1
2
3
0
1
2
3
4
5
6
7
0
1
3
0
Pin
outputs a waveform and the OUTC0k pin (k=0, 1, 4, 5), set as above, outputs a 16-bit low-order waveform.
/OUTC1
/OUTC1
/OUTC1
/OUTC1
/OUTC3
/OUTC3
/OUTC3
/OUTC3
/OUTC3
/OUTC3
/OUTC3
/OUTC3
/OUTC2
/OUTC2
3
J
G
4
a
0 -
n
o r
3 .
1
u
, 1
3
p
1
0
2
0 (2)
1 (2)
2 (2)
0 (2)
1 (2)
0
2
0
1
0 (1,2)
1 (1,2)
2 (1,2)
3 (1,2)
0 (1)
1 (1)
2 (1)
3 (1)
4 (1)
5 (1)
6 (1)
7 (1)
4 (1)
5 (1)
2
(
M
0
0
3
6
2
C
PS0 to PS2, PS5 to PS9 Registers PSL0, PSL1, PSL2, PSL3 Registers
PS0_4 = 1
PS1_0 = 1
PS1_1 = 1
PS1_3 = 1
PS1_4 = 1
PS1_5 = 1
PS1_6 = 1
PS1_7 = 1
PS2_1 = 1
PS2_2 = 1
PS3_2 = 1
PS5_0 = 1
PS5_1 = 1
PS5_2 = 1
PS5_3 = 1
PS6_0 = 1
PS6_1 = 1
PS6_2 = 1
PS6_3 = 1
PS6_4 = 1
PS6_5 = 1
PS6_6 = 1
PS6_7 = 1
PS7_0 = 1
PS7_1 = 1
Page 274
8 /
, 3
M
3
2
C
f o
8 /
4
3
8
) T
8
PSL0_4 = 1
PSL1_0 = 0
PSL1_1 = 0
PSL1_3 = 0
PSL1_4 = 0
PSL1_5 = 1
PSL1_6 = 0
-
PSL2_1 = 1
PSL2_2 = 0
PSL3_2 = 1
-
-
-
Bit and Setting
21. Intelligent I/O (Waveform Generation Function)
PSC Register
-
PSC_0 = 1
PSC_1 = 1
PSC_3 = 1
PSC_4 = 1
-
PSC_6 = 0
-
-
-
-
-
-
-

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