m30833fjgp Renesas Electronics Corporation., m30833fjgp Datasheet - Page 493

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m30833fjgp

Manufacturer Part Number
m30833fjgp
Description
Renesas 16/32-bit Single-chip Microcomputer M16c Family / M32c/80 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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R
R
M
27.7 DMAC
e
E
3
. v
J
2
0
C
1
9
3 .
B
8 /
• Set DMAC-associated registers while the MDi1 to MDi0 bits (i=0 to 3) in the channel to be used are set
• Do not set the DRQ bit in the DMiSL register to "0" (no request).
• To start a DMA transfer by a software trigger, set the DSR bit and DRQ bit in the DMiSL register to "1"
• Do not generate a channel i DMA request when setting the MDi1 to MDi0 bits in the DMDj register (j=0,1)
• Select the peripheral function which causes the DMA request after setting the DMA-associated registers.
• Enable DMA
0
When a DMA request is generated but the receiving channel is not ready to receive
to "00
the end of the setup procedure to start DMA requests.
does not occur and the DRQ bit is set to "0".
simultaneously.
corresponding to channel i to "01
channel i is set to "1".
If none of the conditions above (setting INT interrupt as DMA request source) apply, do not write "1" to
the DCTi register.
gram.
1
3
0
3
J
G
NOTES:
e.g.,
NOTES:
4
a
o r
0 -
n
OR.B #0A0h,DMiSL
1. The MDi1 to MDi0 bits are set to "00
2. DMA is enabled when the values set in the MDi1 to MDi0 bits in the DMDj register are changed
3 .
2
u
1
" (DMA disabled). Set the MDi1 to MDi0 bits to "01
, 1
3
p
1
times).
from "00
(
2
M
0
0
3
6
(2)
2
C
after setting the DMiSL register (i=0 to 3) and waiting 6 BCLK cycles or more by pro-
8 /
Page 470
2
, 3
" (DMA disabled) to "01
M
3
2
C
f o
8 /
4
Set the DSR and DRQ bits to "1" simultaneously.
3
8
) T
8
2
" (single transfer) or "11
______
2
" (single transfer) or "11
2
" or the DCTi register is set to "0000
2
" (single transfer) or "11
2
" (repeat transfer), if the DCTi register of
2
" (repeat transfer).
27. Precautions (DMAC)
2
(1)
" (repeat transfer) at
, the DMA transfer
16
" (transferred 0

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