m30833fjgp Renesas Electronics Corporation., m30833fjgp Datasheet - Page 282

• Manufacturer Part Number: m30833fjgp
• Description: Renesas 16/32-bit Single-chip Microcomputer M16c Family / M32c/80 Series
• Manufacturer: Renesas Electronics Corporation.

R
R
M
e
E
3
. v
J
2
0
Figure 21.11 G0TM0 to G0TM7, G1TM0 to G1TM7, Registers and G0POCR0 to G0POCR7, G1POCR0
1
C
9
3 .
B
8 /
0
1
3
0
3
J
G
4
a
b15
Group i Time Measurement Register j (i=0,1; j=0 to 7)
0 -
n
o r
3 .
1
Group i Waveform Generation Control Register j (i=0 to 1; j=0 to 7)
u
b7
, 1
3
p
NOTES:
1
b6
2
(
1. Groups 0 and 1 have 16-bit and 32-bit waveform generation functions.
2. This setting is valid only for even channels. In SR waveform output mode, values written to the
3. To receive data in UART mode of group 0 and 1, set the GiPOCR2 register to "0000 0110
4. This setting is valid only for channels 0 and 1. To use ISTxDi, set the MOD2 to MOD0 bits in the
5. The inverse output function is the final step in the waveform generation process. If the INV bit is set to
M
0
to G1POCR7 Registers
If the CAS bit in the GiBCR1 register is set to "0" (16-bit waveform generation function), the
G0POCR2 to G0POCR3 and G0POCR 6 to G0POCR7 registers cannot be used. When write, set
these registers to "00
If the CAS bit is set to "1" (32-bit waveform generation function), set the same values in the G0POCRj
and G1POCRj registers.
corresponding odd channel (next channel after an even channel) are ignored. Even channels output
waveforms. Odd channels output no waveform.
GiPOCR0 register to "111
GiPOCR1 register to"111
and 1 and for the communication function.
"1", the output signal is "H" when the IVL bit is set to "0" and "L" when the IVL bit is set to "1".
b5
0
3
b8
6
2
b7
b4
C
Page 259
8 /
b3
, 3
b2
M
b1
b0
3
2
b0
The value of the base timer is stored every
trigger input. When the CAS bit in the GiBCR1
register is set to "1" (32-bit time measurement),
16 low-order bits are stored into the G0TMj
register and 16 high-order bits are into stored the
G1TMj register.
Symbol
G0TM0 to G0TM2
G0TM3 to G0TM5
G0TM6 to G0TM7
G1TM0 to G1TM2
G1TM3 to G1TM5
G1TM6 to G1TM7
C
f o
16
8 /
Symbol
4
MOD0
MOD1
MOD2
".
RLD
3
(b3)
(b6)
INV
8
IVL
Bit
2
) T
2
Symbol
G0POCR0 to G0POCR3
G0POCR4 to G0POCR7
G1POCR0 to G1POCR3
G1POCR4 to G1POCR7
". Do not set the MOD2 to MOD0 bits to "111
8
". To use ISCLKi for an output, set the MOD2 to MOD0 bits in the
Nothing is assigned. When write, set to "0".
When read, its content is indeterminate.
Output Initial Value
Select Bit
GiPOj Register Value
Reload Timing Select Bit
Inverse Output Function
Select Bit
Operation Mode
Select Bit
Nothing is assigned. When write, set to "0".
When read, its content is indeterminate.
00C1
00C7
00CD
0101
0107
010D
Address
Function
Bit Name
16
16
16
16
16
16
(5)
- 0100
- 0106
- 00C0
- 00C6
- 010C
- 00CC
16,
16,
16,
16,
16,
16,
0103
0109
00C3
00C9
010F
00CF
Address
00D0
00D4
0110
0114
16
16
16
16
16
16
b2
0
0
0
0
1
1
1
1
0: Outputs "L" as default value
1: Outputs "H" as default value
0: Reloads the GiPOj register when
1: Reloads the GiPOj register when
0: Output is not inversed
1: Output is inversed
- 0102
- 0108
16
16
16
16
- 010E
- 00C2
- 00C8
b1
0
0
1
1
0
0
1
1
- 00CE
, 0111
, 0115
, 00D1
, 00D5
value is written
the base timer is reset
b0
0
1
0
1
0
1
0
1
: Single waveform output mode
: SR waveform output mode
: Phase-delayed waveform
: Do not set to this value
: Do not set to this value
: Do not set to this value
: Do not set to this value
: Use a communication function
output mode
output
16,
16,
16
16,
16,
16
16
16
16
16
0105
010B
, 0112
, 0116
, 00D2
, 00D6
00C5
00CB
(4)
2
16
16
" except in the channels 0
Function
16
16
16
16
- 0104
- 010A
Setting Range
16
16
, 0113
, 0117
- 00C4
- 00CA
, 00D3
, 00D7
16
16
16
16
16
16
16
16
After Reset
Indeterminate
Indeterminate
Indeterminate
Indeterminate
Indeterminate
Indeterminate
(3)
After reset
0X00 X000
0X00 X000
0X00 X000
0X00 X000
2
".
(2)
RW
RO
(1)
RW
RW
RW
RW
RW
RW
RW
2
2
2
2
21. Intelligent I/O