zl50019gag2 Zarlink Semiconductor, zl50019gag2 Datasheet - Page 104

• Manufacturer Part Number: zl50019gag2
• Description: Enhanced 2 K Digital Switch With Stratum 4e Dpll
• Manufacturer: Zarlink Semiconductor

† Characteristics are over recommended operating conditions unless otherwise stated.
AC Electrical Characteristics
1
16.384 Mbps
Output Frame Boundary
(4.096 MHz)
2.048 Mbps
4.096 Mbps
8.192 Mbps
STio Delay - Active to Active
@2.048 Mbps
@4.096 Mbps
@8.192 Mbps
@16.384 Mbps
@2.048 Mbps
@4.096 Mbps
@8.192 Mbps
@16.384 Mbps
@2.048 Mbps
@4.096 Mbps
@8.192 Mbps
@16.384 Mbps
STio0 - 31
STio0 - 31
STio0 - 31
STio0 - 31
CKo0
FPo0
Figure 37 - ST-BUS Output Timing Diagram when Operated at 2, 4, 8 or 16 Mbps
Characteristic
Ch255
Bit2
Ch255
Bit1
Ch63
Bit0
Ch31
Bit0
Ch127
Ch255
Bit0
Bit0
†
- ST-BUS/GCI-Bus Output Timing
Bit7
Ch0
t
SOD16
t
Ch0
Bit7
SOD8
Ch0
Bit6
t
t
t
t
Sym.
t
t
t
t
t
t
t
t
t
SOD16
SOD16
SOD16
SOD4
SOD2
SOD4
SOD8
SOD2
SOD4
SOD8
SOD2
SOD4
SOD8
t
SOD2
Ch0
Bit7
Ch0
Bit5
Zarlink Semiconductor Inc.
Ch0
Bit6
Ch0
Bit4
ZL50019
Min.
-6
-6
-6
-6
1
1
1
1
0
0
0
0
Ch0
Bit3
Ch0
Bit7
104
Ch0
Bit5
Typ.
Ch0
Bit2
Bit6
Ch0
Ch0
Bit1
Bit4
Ch0
Max.
Ch0
Bit0
8
8
8
8
6
6
6
6
0
0
0
0
Bit3
Ch0
Bit7
Ch1
Units
Bit6
Ch1
Bit5
Ch0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Ch0
Bit2
Ch1
Bit5
C
Master Mode
Multiplied Slave Mode
Divided Slave Mode
L
Ch1
Bit4
= 30 pF
Bit6
Ch0
Ch0
Bit1
Test Conditions
Bit3
Ch1
Ch0
Bit4
Bit2
Ch1
Ch0
Bit0
Ch1
Bit1
Data Sheet
V
V
V
V
CT
CT
CT
CT