zl50019gag2 Zarlink Semiconductor, zl50019gag2 Datasheet - Page 89

• Manufacturer Part Number: zl50019gag2
• Description: Enhanced 2 K Digital Switch With Stratum 4e Dpll
• Manufacturer: Zarlink Semiconductor

24.3
Connection memory high provides the detailed information required for µ-law and A-law conversion. ICL and OCL
bits describe the Input Coding Law and the Output Coding Law, respectively. They are used to select the expected
PCM coding laws for the connection, on the TDM inputs, and on the TDM outputs. The V/D bit is used to select the
class of coding law. If the V/D bit is cleared (to select a voice connection), the ICL and OCL bits select between
A-law and µ-law specifications related to G.711 voice coding. If the V/D bit is set (to select a data connection), the
ICL and OCL bits select between various bit inverting protocols. These coding laws are illustrated in the following
table. If the ICL is different than the OCL, all data bytes passing through the switch on that particular connection are
translated between the indicated laws. If the ICL and the OCL are the same, no coding law translation is performed.
The ICL, the OCL bits and V/D bit only have an effect on PCM code translations for constant delay connections,
variable delay connections and per-channel message mode.
Connection Memory High (CM_H) Bit Assignment
Note 1:
Note 2:
15 - 5
3 - 2
1 - 0
Bit
15
4
0
For proper
Refer to G.711 standard for detail information of different laws.
14
0
OCL1 - 0
ICL1 - 0
Unused
Name
V/D
13
0
Table 55 - Connection Memory High (CM_H) Bit Assignment
µ-
law/A-law conversion, the CM_H bits should be set before Bit 15 of CM_L is set to high.
12
0
Reserved
In normal functional mode, these bits MUST be set to zero.
Voice/Data Control
When this bit is low, the corresponding channel is for voice.
When this bit is high, the corresponding channel is for data.
Input Coding Law.
Output Coding Law
11
0
ICL1-0
OCL1-0
00
01
10
11
10
0
00
01
10
11
Zarlink Semiconductor Inc.
9
0
For Voice (V/D bit = 0)
µ-law w/o Magnitude
For Voice (V/D bit = 0)
ZL50019
µ-law w/o Magnitude
CCITT.ITU A-law
CCITT.ITU µ-law
CCITT.ITU A-law
CCITT.ITU µ-law
A-law w/o ABI
8
0
A-law w/o ABI
Inversion
89
Inversion
7
0
Description
Output Coding Law
Input Coding Law
6
0
5
0
For Data (V/D bit = 1)
For Data (V/D bit = 1)
V/D
4
All Bits Inverted
All Bits Inverted
Inverted ABI
Inverted ABI
No code
No code
ICL
ABI
ABI
3
1
ICL
2
0
OCL
1
1
Data Sheet
OCL
0
0