zl50019gag2 Zarlink Semiconductor, zl50019gag2 Datasheet - Page 90

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zl50019gag2

Manufacturer Part Number
zl50019gag2
Description
Enhanced 2 K Digital Switch With Stratum 4e Dpll
Manufacturer
Zarlink Semiconductor
Datasheet
25.0
This section contains application-specific details for clock and crystal operation and power supply decoupling.
25.1
The device requires a 20 MHz master clock source at the OSCi pin when operating in Master mode or in Divided
Slave with OSC mode. The clock source may be either an external clock oscillator connected to the OSCi pin, or an
external crystal connected between the OSCi and OSCo pins. If an external clock source is present, OSC_EN must
be tied high.
Note that using a crystal is only suitable for wider tolerance applications (i.e., ±100 ppm). For stratum 4E
applications a clock oscillator with a tolerance of ±32 ppm should be used. See Application Note ZLAN-68 for a list
of Oscillators and Crystals that can be used with Zarlink PLL’s and Digital Switches with embedded PLL’s.
25.1.1
When an external crystal oscillator is used, a complete oscillator circuit made up of a crystal, resistor and capacitors
is shown in Figure 23 on page 90. XC is a buffered version of the 20 MHz input clock connected to the internal
circuitry.
The accuracy of a crystal oscillator circuit depends on the crystal tolerance as well as the load capacitance
tolerance. Typically, for a 20 MHz crystal specified with a 32 pF load capacitance, each 1 pF change in load
capacitance contributes approximately 9 ppm to the frequency deviation. Consequently, capacitor tolerances and
stray capacitances have a major effect on the accuracy of the oscillator frequency. The trimmer capacitor shown in
Figure 23 on page 90 may be used to compensate for capacitive effects.
The crystal should be a fundamental mode type - not an overtone. The fundamental mode crystal permits a simpler
oscillator circuit with no additional filter components and is less likely to generate spurious responses. The crystal
accuracy only affects the output clock accuracy in the freerun or the holdover mode. The crystal specification is as
follows:
Frequency
Tolerance
Oscillation Mode
Resonance Mode
Load Capacitance
Maximum Series Resistance
Approximate Drive Level
OSCi Master Clock Requirement
Applications
External Crystal Oscillator
XC
2 K DX
Figure 23 - Crystal Oscillator Circuit
20 MHz
As required
Fundamental
Parallel
20 pF - 32 pF
35 Ω
1 mW
Zarlink Semiconductor Inc.
OSCi
1 MΩ
OSCo
ZL50019
90
25 pF
20 MHz
25 pF
Data Sheet

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