at52sq1283j ATMEL Corporation, at52sq1283j Datasheet - Page 12

• Manufacturer Part Number: at52sq1283j
• Description: At52sq1283j 128-mbit Flash + 32-mbit Psram Stack Memory
• Manufacturer: ATMEL Corporation

6.14
6.15
6.16
12
Erase Suspend/Erase Resume
Program Suspend/program Resume
Protection Registers
AT52SQ1283J
The Erase Suspend command allows the system to interrupt a sector erase or plane erase oper-
ation. The erase suspend command does not work with the Chip Erase feature. Using the erase
suspend command to suspend a sector erase operation, the system can program or read data
from a different sector within the same plane. Since this device is organized into thirty-two
planes, there is no need to use the erase suspend feature while erasing a sector when you want
to read data from a sector in another plane. After the Erase Suspend command is given, the
device requires a maximum time of 15 µs to suspend the erase operation. After the erase opera-
tion has been suspended, the plane that contains the suspended sector enters the erase-
suspend-read mode. The system can then read data or program data to any other sector within
the device. An address is not required during the Erase Suspend command. During a sector
erase suspend, another sector cannot be erased. To resume the sector erase operation, the
system must write the Erase Resume command. The Erase Resume command is a one-bus
cycle command, which does require the plane address. Read, Read Status Register, Product ID
Entry, Clear Status Register, Program, Program Suspend, Erase Resume, Sector Soft-
lock/Hardlock, Sector Unlock are valid commands during an erase suspend.
The Program Suspend command allows the system to interrupt a programming operation and
then read data from a different word within the memory. After the Program Suspend command is
given, the device requires a maximum of 10 µs to suspend the programming operation. After the
programming operation has been suspended, the system can then read from any other word
within the device. An address is not required during the program suspend operation. To resume
the programming operation, the system must write the Program Resume command. The pro-
gram suspend and resume are one-bus cycle commands. The command sequence for the
erase suspend and program suspend are the same, and the command sequence for the erase
resume and program resume are the same. Read, Read Status Register, Product ID Entry, Pro-
gram Resume are valid commands during a Program Suspend.
The AT52SQ1283J contains two (PR0 - PR1) registers that can be used for security purposes in
system design. Please see the
address locations within each protection register. The first protection register (PR0) is divided
into two 64-bit blocks. The two blocks are designated as block A and block B. The data in block
A is non-changeable and is programmed at the factory with a unique number. The data in block
B is programmed by the user and can be locked out such that data in the block cannot be repro-
grammed. The other register (PR1) has 2,048 bits (128 words) that are all user programmable.
To program block B in PR0 or to program PR1 register, a two-bus cycle command must be used
as shown in the
out PR1, a two-bus cycle command must also be used as shown in the
Table” on page
080h and data bit D1 must be zero during the second bus cycle. All other data bits during the
second bus cycle are don’t cares. To lock out PR1, the address used in the second bus cycle is
089h, and sixteen bits of data are programmed. If all of these bits are programmed to a zero, the
register is locked. After being locked, the protection register cannot be unlocked. To determine
whether block B in PRO or PR1 is locked out, the Status of Protection PR0 (block B) or PR1
command is given. For block B in PRO, if data bit D1 is zero, block B is locked. If data bit D1 is
one, block B can be reprogrammed. For PR1, sixteen bits of data are read out. If all sixteen bits
are 0s, the register is locked. To read a protection register, the Product ID Entry command is
“Command Definition Table” on page
19. To lock out block B in PRO, the address used in the second bus cycle is
“Protection Register Addressing Table” on page 20
19. To lock out block B in PRO or to lock
“Command Definition
3525B–STKD–3/05
for the