at52sq1283j ATMEL Corporation, at52sq1283j Datasheet - Page 16

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at52sq1283j

Manufacturer Part Number
at52sq1283j
Description
At52sq1283j 128-mbit Flash + 32-mbit Psram Stack Memory
Manufacturer
ATMEL Corporation
Datasheet
6.29
6.27
3525B–STKD–3/05
Full Erase Status Check Flowchart
Sector Erase Flowchart
Sector
Sector
Sector
Status Check
Read Status
(If Desired)
Full Erase
Write 20,
Complete
Write D0,
Register
SR7 =
Start
Sector
Address
Address
Read Status
Erase
Successful
1
SR4, SR5
Register
SR5 =
SR1 =
SR3 =
Erase
0
0
0
0
=
(Erase Confirm)
0
(
Sector
1
1,1
1
1
Erase)
Suspend
Erase
Sequence Error
Sector
Sector
V
Command
No
P P
Error
Error
Error
Range
Locked
Erase
Yes
Suspend
Erase
Loop
6.28
6.30
Repeat for subsequent sector erasures.
Full status register check can be done after each sector erase,
or after a sequence of sector erasures.
Write FF after the last operation to enter read mode.
SR1, SR3 must be cleared before the Write State Machine
allows further erase attempts.
Only the Clear Status Register command clears SR1, SR3,
SR4, SR5.
If an error is detected, clear the status register before
attempting an erase retry or other error recovery.
Operation
Operation
Write
Write
Read
Bus
Bus
Idle
Idle
Idle
Idle
Idle
Sector Erase Procedure
Full Erase Status Check Procedure
Command
Command
Confirm
Sector
Erase
Setup
Erase
None
None
None
None
None
None
Comments
Data = 20
Addr = Sector to be erased (SA)
Data = D0
Addr = Sector to be erased (SA)
Status register data: Toggle CE
or
OE to update status register data
Check SR7
1 = WSMS Ready
0 = WSMS Busy
Comments
Check SR3:
1 = V
Check SR4, SR5:
Both 1 = Command Sequence
Error
Check SR5:
1 = Sector Erase Error
Check SR1:
1 = Attempted erase of locked
sector; erase aborted.
AT52SQ1283J
PP
Range Error
16

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