at52sq1283j ATMEL Corporation, at52sq1283j Datasheet - Page 14

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at52sq1283j

Manufacturer Part Number
at52sq1283j
Description
At52sq1283j 128-mbit Flash + 32-mbit Psram Stack Memory
Manufacturer
ATMEL Corporation
Datasheet
6.23
6.21
3525B–STKD–3/05
Full Status Check Flowchart
Word Program Flowchart
Word Address
Word Address
Read Status
Write Data,
Full Status
(If Desired)
Write 40,
Complete
Program
Register
SR7 =
Check
Start
Read Status
Successful
1
Register
Program
SR4 =
SR3 =
SR1 =
0
0
0
(Setup)
(Confirm)
0
1
1
1
Suspend?
Protect Error
V
No
Program
P P
Device
Error
Error
Range
Yes
Program
Suspend
Loop
6.22
6.24
Repeat for subsequent Word Program operations.
Full status register check can be done after each program, or
after a sequence of program operations.
Write FF after the last operation to set to the Read state.
Operation
SR3 MUST be cleared before the Write State Machine allows
further program attempts.
If an error is detected, clear the status register before
continuing operations – only the Clear Status Register
command clears the status register error bits.
Operation
Read
Write
Write
Bus
Bus
Idle
Idle
Idle
Idle
Word Program Procedure
Full Status Check Procedure
Command
Command
Program
Setup
None
None
None
None
None
Data
Comments
Check SR3:
1 = V
Check SR4:
1 = Data Program Error
Check SR1:
1 = Sector locked; operation
aborted
Comments
Data = 40
Addr = Location to program
Data = Data to program
Addr = Location to program
Status register data: Toggle CE or
OE to update status register
Check SR7
1 = WSM Ready
0 = WSM Busy
PP
AT52SQ1283J
Error
14

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