at52sq1283j ATMEL Corporation, at52sq1283j Datasheet - Page 9

• Manufacturer Part Number: at52sq1283j
• Description: At52sq1283j 128-mbit Flash + 32-mbit Psram Stack Memory
• Manufacturer: ATMEL Corporation

6.12.3
6.13
3525B–STKD–3/05
Read Status Register
Sector Protection Detection
Figure 6-2.
Note:
A software method is available to determine if the sector protection Softlock or Hardlock features
are enabled. When the device is in the software product identification mode a read from the I/O0
and I/O1 at address location 00002H within a sector will show if the sector is unlocked, soft-
locked, or hardlocked.
Table 6-2.
The status register indicates the status of device operations and the success/failure of that oper-
ation. The Read Status Register command causes subsequent reads to output data from the
status register until another command is issued. To return to reading from the memory, issue a
Read command.
The status register bits are output on I/O7 - I/O0. The upper byte, I/O15 - I/O8, outputs 00H
when a Read Status Register command is issued.
The contents of the status register [SR7:SR0] are latched on the falling edge of OE or CE
(whichever occurs last), which prevents possible bus errors that might occur if status register
I/O1
1. The notation [X, Y, Z] denotes the locking state of a sector. The current locking state of a sector
0
0
1
1
is defined by the state of WP and the two bits of the sector-lock status D[1:0].
Sector Locking State Diagram
Sector Protection Status
I/O0
WP = V
WP = V
0
1
0
1
IL
IH
= 0
= 1
UNLOCKED
Sector Protection Status
Sector Not Locked
Softlock Enabled
Hardlock Enabled
Both Hardlock and Softlock Enabled
[000]
[110]
[100]
A
A
A
C
B
B
B
LOCKED
C
[001]
[011]
[111]
[101]
A
B
C
C
= Softlock Command
= Hardlock Command
= Unlock Command
Hardlocked is disabled by
Hardlocked
Power-Up/Reset
Power-Up/Reset
Default
Default
WP = V
AT52SQ1283J
IH
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