adsst-sharc-melody-ultra Analog Devices, Inc., adsst-sharc-melody-ultra Datasheet - Page 22

• Manufacturer Part Number: adsst-sharc-melody-ultra
• Description: Sharc Melody Ultra Audio Processor
• Manufacturer: Analog Devices, Inc.

ADSST-SHARC-Melody-Ultra
POWER DISSIPATION
Total power dissipation has two components: one due to
internal circuitry and one due to the switching of external
output drivers. Internal power dissipation depends on the
instruction execution sequence and the data operands involved.
Using the current specifications (I
I
the programmer can estimate the SHARC Melody Ultra
processor’s internal power supply (V
specific application, according to the following formula:
The external component of total power dissipation is caused by
the switching of output pins. Its magnitude depends on
and is calculated by
The load capacitance should include the processor package
capacitance (C
load high and then back low. Address and data pins can drive
high and low at a maximum rate of 1/t
SDRAM memory.
Example:
Estimate P
The P
drive.
DD-IDLE
• The number of output pins that switch during each cycle
• The maximum frequency at which they can switch (f )
• Their load capacitance (C )
• Their voltage swing (V
• Addresses are incremental and on the same page
• A system with one bank of external memory (32 bit)
• Two 1M × 16 SDRAM chips are used, each with a load of
• External data memory writes can occur every cycle at a
• The bus cycle time is 50 MHz
• The external SDRAM clock rate is 100 MHz
• SDRAM refresh cycles are ignored
I
(O)
P
10 pF (ignoring trace capacitance)
rate of 1/t
DDINT
EXT
EXT
) from the
equation is calculated for each class of pins that can
= O × C × V
+ % High × I
+ % Low × I
+ % Idle × I
EXT
= % Peak × I
with the following assumptions:
IN
CK
). The switching frequency includes driving the
, with 50% of the pins switching
Electrical Characteristics
DD-IDLE
DD
DD-INLOW
DD-INHIGH
2
× f
DD-INPEAK
DD
)
DD-INPEAK
DDINT
CK
while writing to an
) input current for a
, I
(
DD-INHIGH
Table 5
on page 20),
, I
DD-INLOW
Rev. 0 | Page 22 of 28
,
A typical power consumption can now be calculated for these
conditions by adding a typical internal power dissipation:
where P
Electrical Characteristics
OUTPUT DRIVE CURRENTS
Figure 14
ers of the SHARC Melody Ultra. The curves represent the
current drive capability of the output drivers as a function of
output voltage.
TEST CONDITIONS
Output Enable Time
Output pins are considered to be enabled when they have made
a transition from a high impedance state to the point when they
start driving. The output enable time, t
the point when a reference signal reaches a high or low voltage
level to the point when the output has reached a specified high
or low trip point, as shown in
as the data bus) are enabled, the measurement value is that of
the first pin to start driving.
Output Disable Time
Output pins are considered to be disabled when they stop driv-
ing, go into a high impedance state, and start to decay from
their output high or low voltage. The time for the voltage on the
bus to decay by ∆V is dependent on the capacitive load, C
the load current, I
equation
The output disable time, t
and t
P
TOTAL
t
DECAY
DECAY
–10
–20
–30
–40
–50
–60
–70
PLL
= P
70
60
50
40
30
20
10
0
, as shown in F
shows typical I-V characteristics for the output driv-
0
is AI
EXT
V
=
DDEXT
C
+ P
V
DD
0.5
DDEXT
L
I
L
∆
× 1.8 V, using the value for AI
= 3.47V, –40°C
Figure 14. Typical Drive Currents
. This decay time can be approximated by the
L
V
INT
DDEXT
V
= 3.47V, –40°C
+ P
1.0
SOURCE (V
igure 15
= 3.3V, +25°C
PLL
V
(
DIS
Table 5
DDEXT
, is the difference between t
1.5
Figure 15
= 3.13V, +105°C
DDEXT
. The time t
V
2.0
on page 20).
DDEXT
) VOLTAGE (V)
ENA
. If multiple pins (such
= 3.3V, +25°C
V
2.5
DDEXT
, is the interval from
MEASURED
= 3.13V, +105°C
3.0
DD
listed in the
3.5
is the
MEASURED
L
4.0
, and