cn8237 Mindspeed Technologies, cn8237 Datasheet - Page 308

• Manufacturer Part Number: cn8237
• Description: Atm Oc-12 Servicesar Plus With Xbr Traffic Management
• Manufacturer: Mindspeed Technologies

14.0 CN8237 Registers
14.4 Scheduler Registers
0x170
0x180
14-18
0x178
31–29
27–16
31–16
15–0
31–0
15–0
Bit
Bit
Bit
28
—
—
—
ABR Decision Table Lookup Base Register (SCH_ABRBASE)
PCR Queue Interval 0 and 1 Register (PCR_QUE_INT01)
ABR Congestion Register (SCH_CNG)
Field
Field
Field
Size
Size
Size
12
16
32
16
16
3
1
OOR_INT
Reserved
OOR_EN
SCH_ABRB[15:0]
FBQ_CNG[31:0]
QPCR_INT1
QPCR_INT0
The SCH_ABRBASE register sets the base address in SAR-shared memory for
the ABR decision table. This address is 128-byte aligned, and only the 16 most
significant bits of the address are specified in the SCH_ABRBASE register.
NOTE:
The SCH_CNG register sets each reassembly free buffer queue to a congested or
non-congested state for transmitted reverse RM cells.
The PCR_QUE_INT01 register fields are used to store the two lower PCR values
used in PCR shaping on priority queues that have been enabled for PCR shaping
by setting the QPCR_ENAx bits in the SCH_PRI register. QPCR_INTx values
are used in order: 3, 2, 1, and 0; highest to lowest. PCR is determined by
1 / (QPCR_INTx
Name
Name
Name
The PCI address of these structures is (REGISTER_VALUE
SEG_MEMORY_BASE_ADDRESS.
Mindspeed Technologies
Program and read as 0.
Enable ABR out-of-rate Forward RM cell generation.
ABR out-of-rate Forward RM cell interval. A VCC is examined for an
out-of-rate cell every OOR_INT schedule slots.
Base address for the ABR decision table.
Congestion state for each free buffer queue.
The assigned PCR interval, entered as number of schedule table slots,
used to map to the 3rd-highest priority queue that is enabled for PCR
shaping (using the QPCR_ENAx bits in the SCH_PRI register).
The assigned PCR interval, entered as number of schedule table slots,
used to map to the 4th-highest priority queue that is enabled for PCR
shaping (using the QPCR_ENAx bits in the SCH_PRI register).
×
SYSCLK_period
ATM OC-12 ServiceSAR Plus with xBR Traffic Management
×
SLOT_PER).
™
Description
Description
Description
28237-DSH-001-C
×
0x80) +
CN8237