cn8237 Mindspeed Technologies, cn8237 Datasheet - Page 354

• Manufacturer Part Number: cn8237
• Description: Atm Oc-12 Servicesar Plus With Xbr Traffic Management
• Manufacturer: Mindspeed Technologies

16.0 Electrical and Mechanical Specifications
16.1 Timing
16.1.3 CN8237 Local Memory Interface Timing
Figure 16-5. ZBT Flow Through SRAM Timing Diagram—One Cycle Memory
16-6
RRNW or SRNW
RDATA or SDATA
RBW# or SBW#
RCLK or SCLK
RCS# or SCS#
RA or SA
0 ns
1
t pd cs
t pd a
2
CN8237 one cycle memory interface timing is provided in
memory interface timing is provided in
memory bank organization.
Table 16-5. One Cycle Memory Timing Parameter Characteristics
t
t
t
t
t
t
t
t
NOTE(S):
(1)
(2)
s rd
h rd
pd a
pd cs
pd rnw
pd bw
en d
dis d
Memory Interface to ZBT SRAM Timing - read, write, read - 1 cycle memory
Symbol
40 pF capacitive load
T = SCLK or RCLK period
t pd rnw
Mindspeed Technologies
t pd bw
Data setup time
Data hold time
Address propagation delay
Chip select propagation delay
Read/write propagation delay
Byte write propagation delay
Data enable
Data disable
A1
3
25 ns
t s rd
Parameter
Q1
ATM OC-12 ServiceSAR Plus with xBR Traffic Management
t h rd
t en d
A2
4
D2
Table
™
50 ns
A3
3/4T + 1.25
3/4T + 1.25
3/4T + 1.25
3/4T + 1.25
3/4T + 1.25
t dis d
T/4 + 0.25
16-6. See
5
Min
3
0
Q3
Section 10.2
3/4T + 3.75
3/4T + 3.75
3/4T + 3.75
3/4T + 3.75
3/4T + 3.75
T/4 + 1.25
Table
Max
—
—
6
28237-DSH-001-C
16-5. Two cycle
75 ns
for details of
CN8237
Units
7
ns
ns
ns
ns
ns
ns
ns
ns
8237_009