ST10F272M-4Q3 STMICROELECTRONICS [STMicroelectronics], ST10F272M-4Q3 Datasheet - Page 104

• Manufacturer Part Number: ST10F272M-4Q3
• Description: 16-bit MCU with 256 Kbyte Flash memory and 20 Kbyte RAM
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

Power reduction modes
21.3.1
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In normal running mode (that is when main V
during reset to exercise the EA functionality associated with the same pin: the voltage
supply for the circuitries which are usually biased with V
oscillator used in conjunction with Real Time Clock module), is granted by the active main
V
It must be noted that Stand-by mode can generate problems associated with the usage of
different power supplies in CMOS systems; particular attention must be paid when the
ST10F272M I/O lines are interfaced with other external CMOS integrated circuits: if V
ST10F272M becomes (for example, in Stand-by mode) lower than the output level forced by
the I/O lines of these external integrated circuits, the ST10F272M could be directly powered
through the inherent diode existing on ST10F272M output driver circuitry. The same is valid
for ST10F272M interfaced to active/inactive communication buses during Stand-by mode:
current injection can be generated through the inherent diode.
Furthermore, the sequence of turning on/off of the different voltage could be critical for the
system (not only for the ST10F272M device). The device Stand-by mode current (I
may vary while V
V
phenomenon.
Entering stand-by mode
As already stated, to enter Stand-by mode the XRAM2EN bit in the XPERCON register
must be cleared: This allows the RAM interface to be frozen immediately, avoiding any data
corruption. As a consequence of a RESET event, the RAM power supply is switched to the
internal low-voltage supply V
regulator). The RAM interface remains frozen until the bit XRAM2EN is set again by
software initialization routine (at next exit from main V
Since V
XRAM2EN bit is no longer able to guarantee its content (logic “0”), being the XPERCON
Register powered by internal V
by mode switching dedicated circuit continues to confirm the RAM interface freezing,
irrespective the XRAM2EN bit content; XRAM2EN bit status is considered again when
internal V
If internal V
with bit XRAM2EN set, the RAM Supply switching circuit is not active: in case of a
temporary drop on internal V
no spurious Stand-by mode switching can occur (the RAM is not frozen and can still be
accessed).
The ST10F272M Core module, generating the RAM control signals, is powered by internal
V
switched to V
from ST10F272M Core (active low signal) is low enough to be recognized as a logic “0” by
the RAM interface (due to V
address for the RAM and an unwanted data corruption could occur. For this reason, an extra
interface, powered by the switched supply, is used to prevent the RAM from this kind of
potential corruption mechanism.
DD
DD
18
.
supply; during turning off transient these control signals follow the V
and V
18
18
is falling down (as a consequence of V
STBY
18
comes back over internal stand-by reference V
18SB
becomes lower than internal stand-by reference (V
pins. System noise on both V
DD
internal reference. It could happen that a high level of RAM write strobe
to V
STBY
18
18
18SB
(and vice versa) transition occurs: some current flows between
lower than V
18
voltage versus internal V
. This does not generate any problem, because the Stand-
(derived from V
18SB
DD
DD
): The bus status could contain a valid
is on) the V
and V
DD
STBY
turning off), it can happen that the
DD
STBY
through the low-power voltage
18SB
STBY
power-on reset sequence).
18SB
STBY
can contribute to increase this
during normal code execution,
(see in particular the 32 kHz
.
18SB
pin can be tied to V
) of about 0.3 to 0.45V
18
, while RAM is
ST10F272M
STBY
SS
DD
)
of