MK50H28N ST Microelectronics, Inc., MK50H28N Datasheet - Page 29

• Manufacturer Part Number: MK50H28N
• Description: Multi Logical Link Frame Relay Controller
• Manufacturer: ST Microelectronics, Inc.

There are 8 independent counter-timers. The lower 8 bits of IADR+08 are used as a scaler for nT1,
nT2 and TP. The scaler is driven by a clock which is 1/32 of SYSCLK. The dN1 is a 16 bit counter and
is used to count the number of bytes in a frame. The counters nN1, nN2, and nN3 are used for the LMI
frames. The Host will write the periods of all the timers/counters into the Initialization Block.
4.2.2 Timers/Counters
02:00
BIT
IADR + 04
IADR + 06
IADR + 10
IADR + 12
IADR + 14
IADR + 08
LBACK
NAME
Loopback Control puts MK50H28 into one of several loopback configurations.
LBACK
1
5
Ntwk N393
0
4
5
6
7
COUNTER nN1 / N391
1
4
1
3
1
2
Normal operation. No loopback.
Simple loopback. Receive data and clock are driven internally by
transmit data and clock. Transmit clock must be supplied externally
Clockless loopback. Receive data is driven internally by transmit data.
Transmit and receive clocks are driven by SYSCLK divided by 8.
Silent loopback. Same as simple loopback with td pin forced to all ones.
Silent clockless loopback. Combination of Silent and Clockless
loopbacks. Receive data is driven internally by transmit data, transmit
and receive clocks are driven by SYSCLK divided by 8. The TD pin is
forced to all ones.
1
1
Ntwk N392
0
0
TIMER nT1 / T391
TIMER nT2 / T392
COUNTER dN1
0
9
TIMER TP
0
8
DESCRIPTION
User N393/nN3
0
7
0
6
DESCRIPTION
0
5
SCALER
0
4
User N392/nN2
0
3
0
2
0
1
0
0
MK50H28
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