PF38F5070M0Q0B0 NUMONYX [Numonyx B.V], PF38F5070M0Q0B0 Datasheet - Page 113

• Manufacturer Part Number: PF38F5070M0Q0B0
• Manufacturer: NUMONYX [Numonyx B.V]

Numonyx™ StrataFlash
Table 53: System Interface Information (Sheet 2 of 2)
12.4
Table 54: Device Geometry Definition
April 2008
309823-10
Offset
Offset
2Dh
27h
28h
2Ah
2Ch
31h
35h
24h
25h
26h
Length
Length
1
2
2
1
4
4
4
1
1
1
Device Geometry Definition
n such that device size in bytes = 2
Flash device interface code assignment: n such that n + 1 specifies
the bit field that represents the flash device width capabilities as
described here:
n such that maximum number of bytes in write buffer = 2
Number of erase block regions (x) within the device:
1) x = 0 means no erase blocking; the device erases in bulk.
2) x specifies the number of device regions with one or more
contiguous, same-size erase blocks.
3) Symmetrically blocked partitions have one blocking region.
Erase block region 1 information:
bits 0 - 15 = y, y + 1 = number of identical-size erase blocks.
bits 16 - 31 = z, region erase block(s) size are z x 256 bytes.
Reserved for future erase block region information.
Reserved for future erase block region information.
“n” such that maximum buffer
write timeout = 2
“n” such that maximum block
erase timeout = 2
“n” such that maximum chip
erase timeout = 2
15
—
—
7
®
Cellular Memory (M18)
14
Description
—
—
6
n
n
n
times typical.
13
times typical.
times typical.
—
—
5
Description
12
—
—
4
n
.
Address
x64
11
—
3
24
25
26
x32
10
—
2
--02 (256, 512 Mbit - 90 nm;
128, 256, 512 Mbit - 65 nm)
--01 (1024 Mbit - 65 nm)
x16
—
1
9
n
.
Hex Code
--02
--00
x8
—
0
8
Geometry Definition: Addr,
Address
2D:
27:
28:
29:
2A:
2B:
2C:
2E:
30:
31:
32:
33:
34:
35:
36:
37:
38:
2F:
Hex Code, Value” on
Table 55, “Device
8192 µs (256, 512 Mbit -
4096 µs (1024 Mbit - 65
90 nm; 128, 256, 512
page 114
Table 55, “Device
Geometry
Definition: Addr,
Hex Code, Value”
on page 114
Hex Code
Mbit - 65 nm)
--0A
--01
--00
--00
Value
nm)
4 s
NA
Datasheet
Value
1024
x16
113