PF38F5070M0Q0B0 NUMONYX [Numonyx B.V], PF38F5070M0Q0B0 Datasheet - Page 49
PF38F5070M0Q0B0
Manufacturer Part Number
PF38F5070M0Q0B0
Description
Manufacturer
NUMONYX [Numonyx B.V]
Datasheet
1.PF38F5070M0Q0B0.pdf
(139 pages)
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Numonyx™ StrataFlash
Table 17: AC Input Requirements
Figure 19: Transient Equivalent Testing Load Circuit
Notes:
1.
2.
3.
Table 18: Test Configuration Component Value for Worst Case Speed Conditions
Figure 20: Clock Input AC Waveform
7.2
April 2008
309823-10
t
t
1.7 V Standard Test
2.0 V Standard Test
RISE/FALL
ASKW
Symbol
See the following table for component values.
Test configuration component value for worst case speed conditions.
C
L
includes jig capacitance.
Inputs rise/fall time (Address, CLK, CE#,
OE#, ADV#, WE#, WP#)
Address-Address skew
Read Specifications
Read specifications for 108 MHz and 133 MHz M18 devices are included here. For
additional information on lithography, density, and frequency combinations, see
Table 4, “M18 Product Litho/Density/Frequency Combinations” on page 10
Section 2.0, “Functional
Devices which support frequencies up to 133 MHz must meet additional timing
specifications for synchronous reads (for address latching with CLK) as listed in
Table 20, “AC Read, 133 MHz, VCCQ = 1.7 V to 2.0 V” on page
Test Configuration
®
Cellular Memory (M18)
Parameter
CLK [C]
Under Test
V
Device
CCQ
V
V
IH
IL
/2
Description.
@133MHz, 108MHz
@66MHz
R201
Frequency
R203
C
L
CLKINPUT.vsd
0.3
0
0
Min
R202
Out
1.2
3
3
Max
C
L
ns
30
30
Unit
(pF)
51.
V
At V
IL
to V
CCQ
Condition
IH
/2
or V
in the
IH
Datasheet
to V
IL
49
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