PF38F5070M0Q0B0 NUMONYX [Numonyx B.V], PF38F5070M0Q0B0 Datasheet - Page 92
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PF38F5070M0Q0B0
Manufacturer Part Number
PF38F5070M0Q0B0
Description
Manufacturer
NUMONYX [Numonyx B.V]
Datasheet
1.PF38F5070M0Q0B0.pdf
(139 pages)
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9.6.3.3
9.7
Table 41: Block-Erase Command Bus Cycles
Caution:
Note:
Datasheet
92
Block Erase
Command
The Status Register should be polled for SR0 = 0 (Buffer Ready for Data) to determine
when the array programming has completed, and the write buffer is again available for
loading. The internal address is automatically incremented to enable subsequent array
programming to continue from where the previous buffer-fill/array-program sequence
ended within the block. This cycle can be repeated to program the entire block.
To exit the Program/Verify Phase, write FFFFh to an address outside of the block.
Exit Phase
The Status Register should be polled for SR7 = 1 (Device Ready) indicating the BEFP
algorithm has finished running, and the device has returned to normal operation. A full
error check should be performed to ensure the block was programmed successfully.
Block Erase Operations
Erasing a block changes ‘zeros’ to ‘ones’. To change ones to zeros, a program operation
must be performed (see
on a block basis— an entire block is erased each time an erase command sequence is
issued. Once a block is fully erased, all addressable locations within that block read as
logical ‘ones’ (FFFFh).
Only one block-erase operation can occur at a time. A block-erase operation is not
permitted during Program Suspend.
To perform a block-erase operation, issue the Block Erase command sequence at the
desired block address.
All block-erase operations require the addressed block to be unlocked, and a
valid voltage applied to VPP throughout the block-erase operation. Otherwise,
the operation aborts, setting the appropriate Status Register error bit(s).
The Erase Confirm command latches the address of the block to be erased. The
addressed block is preconditioned (programmed to all zeros), erased, and then verified.
The read mode of the addressed partition is automatically changed to Read Status
Register mode, and remains in effect until another read-mode command is issued.
Issuing the Read Status Register command to another partition switches that partition’s
read mode to the Read Status Register, thereby allowing block-erase progress to be
monitored from that partition’s address. SR0 indicates whether the addressed partition
or other partition is erasing.
During a block-erase operation, the Status Register indicates a busy status (SR7 = 0).
Upon completion, the Status Register indicates a ready status (SR7 = 1). The Status
Register should be checked for any errors, and then cleared.
The only valid commands during a block erase operation are Read Array, Read Device
Information, CFI Query, Read Status and Erase Suspend. After the block-erase
operation has completed, any valid command can be issued.
Device Address
Table 41
Address Bus
Section 9.6, “Programming
Setup Write Cycle
shows the two-cycle Block Erase command sequence.
0020h
Data Bus
Numonyx™ StrataFlash
Block Address
Operations). Erasing is performed
Address Bus
Confirm Write Cycle
®
Cellular Memory (M18)
00D0h
Data Bus
309823-10
April 2008
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