MC68306 Motorola, MC68306 Datasheet - Page 138

• Manufacturer Part Number: MC68306
• Description: Integrated EC000 Processor
• Manufacturer: Motorola

Bits 7, 6, 3, 2—Reserved
COS2, COS1, COS0—Change-of-State
IP2, IP1, IP0—Current State
6.4.1.9 AUXILIARY CONTROL REGISTER (DUACR). The DUACR selects which baud
rate is used and controls the handshake of the transmitter/receiver.
BRG—Baud Rate Generator Set Select
CTMS2–0— Counter/Timer Mode and Source Select
6-30
Starting two serial clock periods after reset, the IPx bits reflect the state of the IPx pins.
If a CTS≈ pin is detected as asserted at that time, the associated COSx bit will be set,
which will initiate an interrupt if the corresponding IECx bit of the DUACR register is
enabled.
Table 6-10 lists the counter/timer mode and source select bit fields.
1 = A change-of-state (high-to-low or low-to-high transition), lasting longer than 25–
0 = No change-of-state has occurred since the last time the CPU read the DUIPCR.
1 = The current state of the respective IPx input is logic one (negated, if used as
0 = The current state of the respective IPx input is logic zero (asserted, if used as
1 = Set 2 of the available baud rates is selected.
0 = Set 1 of the available baud rates is selected. Refer to 6.4.1.4 Clock-Select
50 s has occurred at the corresponding IPx input. When these bits are set, the
DUACR can be programmed to generate an interrupt to the CPU.
A read of the DUIPCR also clears the DUISR COS bit.
CTS ).
CTS ).
Register (DUCSR) for more information on the baud rates.
DUACR
Write Only
RESET:
BRG
7
0
CTMS2 CTMS1 CTMS0
6
0
MC68306 USER'S MANUAL
5
0
4
0
3
–
0
IEC2
2
0
IEC1
1
0
IEC0
0
0
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