MC68306 Motorola, MC68306 Datasheet - Page 95

• Manufacturer Part Number: MC68306
• Description: Integrated EC000 Processor
• Manufacturer: Motorola

5.2.4 Interrupt Registers
Up to seven prioritized external interrupts can be supported by programming the following
registers. More interrupt sources can be supported by external daisy-chaining. The
interrupt inputs are internally synchronized. Edge-triggered interrupts are not supported.
Each interrupt can be either active-high or active-low. The active level is self-programmed
during reset, with no software intervention. Every interrupt must be at its inactive level at
the end of reset. Each interrupt can be enabled or disabled by programming the
corresponding bit in the interrupt control register.
Each interrupt can be auto-vectored, by programming the interrupt control register. Auto-
vectored interrupt acknowledge cycles are zero wait states. If no active interrupt is present
at the level being acknowledged, the MC68306 automatically generates a spurious
interrupt vector, which is a zero wait state. Interrupt input synchronization is frozen during
an interrupt acknowledge cycle, so the acknowledge can safely be used to automatically
negate the interrupt.
5.2.4.1 INTERRUPT CONTROL REGISTER
FFFFFFFA/B
IENT—Timer Interrupt Enable
IEN7–1—Interrupt Enable 7 through 1
AVEC7–1—Autovector Enable 7 through 1
MOTOROLA
RESE
IENT
15
T:
Where:
EXTAL is the crystal period in nanoseconds and period is in nanoseconds.
0
This bit enables the DUART timer interrupt.
These bits enable interrupt 7, 6, 5, 4, 3, 2, and 1.
These bits enable autovectoring for interrupts 7, 6, 5, 4, 3, 2, and 1.
0 = Interrupts disabled.
1 = Interrupts enabled.
0 = Interrupt disabled.
1 = Interrupt enabled.
0 = No autovector.
IEN7
14
0
IEN6
13
0
IEN5
12
0
IEN4
11
0
IEN3
10
0
MC68306 USER'S MANUAL
IEN2
9
0
IEN1
8
0
—
7
1
AVEC
6
7
1
AVEC6
5
1
AVEC5
4
1
AVEC4
3
1
AVEC3
2
1
SUPERVISOR ONLY
AVEC
1
2
1
AVEC
5- 5
0
1
1