MT48H16M16LF MICRON [Micron Technology], MT48H16M16LF Datasheet - Page 23

• Manufacturer Part Number: MT48H16M16LF
• Description: 256Mb: 16 Meg x 16, 8 Meg x 32 Mobile SDRAM
• Manufacturer: MICRON [Micron Technology]

Operations
Bank/Row Activation
Figure 9:
PDF:09005aef8219eeeb/Source: 09005aef8219eedd
MT48H16M16LF_2.fm - Rev F 4/07 EN
Activating a Specific Row in a Specific Bank
Before any READ or WRITE commands can be issued to a bank within the SDRAM, a row
in that bank must be “opened.” This is accomplished via the ACTIVE command, which
selects both the bank and the row to be activated (see Figure 9).
After opening a row (issuing an ACTIVE command), a READ or WRITE command may be
issued to that row, subject to the
the clock period and rounded up to the next whole number to determine the earliest
clock edge after the ACTIVE command on which a READ or WRITE command can be
entered. For example, a
results in 2.5 clocks, rounded to 3. This is reflected in Figure 10 on page 24, which covers
any case where 2 <
specification limits from time units to clock cycles.)
A subsequent ACTIVE command to a different row in the same bank can only be issued
after the previous active row has been “closed” (precharged). The minimum time
interval between successive ACTIVE commands to the same bank is defined by
A subsequent ACTIVE command to another bank can be issued while the first bank is
being accessed, which results in a reduction of total row-access overhead. The minimum
time interval between successive ACTIVE commands to different banks is defined by
t
BA0, BA1
RRD.
A0–A11
RAS#
CAS#
WE#
CKE
CLK
CS#
HIGH
t
RCD (MIN)/
ADDRESS
ADDRESS
t
BANK
RCD specification of 20ns with a 125 MHz clock (8ns period)
ROW
256Mb: 16 Meg x 16, 8 Meg x 32 Mobile SDRAM
23
DON´T CARE
t
t
CK ≤ 3. (The same procedure is used to convert other
RCD specification.
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
RCD (MIN) should be divided by
©2006 Micron Technology, Inc. All rights reserved.
Operations
t
RC.