MT48LC32M4A2FC-8ELIT MICRON [Micron Technology], MT48LC32M4A2FC-8ELIT Datasheet - Page 42

• Manufacturer Part Number: MT48LC32M4A2FC-8ELIT
• Description: SYNCHRONOUS DRAM
• Manufacturer: MICRON [Micron Technology]

TIMING PARAMETERS
*CAS latency indicated in parentheses.
NOTE: 1. For this example, the burst length = 4, the CAS latency = 2, and the READ burst is followed by a “manual”
128Mb: x4, x8, x16 SDRAM
128MSDRAM_E.p65 – Rev. E; Pub. 1/02
DQML, DQMH
SYMBOL*
t
t
t
t
t
t
t
t
t
t
COMMAND
A0-A9, A11
AC(3)
AC(2)
AH
AS
CH
CL
CK(3)
CK(2)
CKH
CKS
BA0, BA1
DQM /
CLK
CKE
A10
DQ
2. x16: A9 and A11 = “Don’t Care”
PRECHARGE.
x8: A11 = “Don’t Care”
t CMS
t CKS
MIN
t AS
t AS
t AS
0.8
1.5
2.5
2.5
7.5
0.8
1.5
7
ACTIVE
ROW
ROW
BANK
T0
-7E
t CMH
t CKH
t AH
t AH
t AH
MAX
5.4
5.4
t RCD
t RAS
t RC
t CK
MIN
0.8
1.5
2.5
2.5
7.5
0.8
1.5
10
T1
NOP
-75
DISABLE AUTO PRECHARGE
MAX
5.4
6
READ – WITHOUT AUTO PRECHARGE
t CMS
t CL
COLUMN m
BANK
T2
READ
MIN
10
t CMH
1
2
3
3
8
1
2
t CH
CAS Latency
-8E
2
MAX
6
6
T3
NOP
t LZ
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t AC
42
T4
D
NOP
OUT
t OH
t AC
m
SYMBOL*
t
t
t
t
t
t
t
t
t
t
CMH
CMS
HZ(3)
HZ(2)
LZ
OH
RAS
RC
RCD
RP
Micron Technology, Inc., reserves the right to change products or specifications without notice.
D
T5
OUT
NOP
t OH
m+1
MIN
t AC
0.8
1.5
37
60
15
15
1
3
-7E
SINGLE BANKS
120,000
ALL BANKS
MAX
PRECHARGE
BANK(S)
5.4
5.4
D
T6
OUT
1
t OH
128Mb: x4, x8, x16
m+2
t RP
t AC
MIN
0.8
1.5
44
66
20
20
1
3
-75
120,000
D
MAX
T7
NOP
OUT
5.4
6
t OH
m+3
t HZ
MIN
50
70
20
20
1
2
1
3
©2001, Micron Technology, Inc.
SDRAM
-8E
BANK
ROW
ACTIVE
ROW
T8
120,000
MAX
6
6
DON’T CARE
UNDEFINED
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns