DAC1617D1G0HN IDT [Integrated Device Technology], DAC1617D1G0HN Datasheet - Page 29

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DAC1617D1G0HN

Manufacturer Part Number
DAC1617D1G0HN
Description
Dual 16-bit DAC, LVDS interface, up to 1 Gsps, x2, x4 and x8 interpolating
Manufacturer
IDT [Integrated Device Technology]
Datasheet
Integrated Device Technology
DAC1617D1G0 3
Preliminary data sheet
10.11.1 NCO in 40 bits
10.11 Single SideBand Modulator (SSBM)
The SSBM is a quadrature modulator that enables mixing the I data and Q data with the
sine and cosine signals generated by the NCO to generate path A and path B
(see Figure 20).
The frequency of the NCO is programmed over 40 bits. NCO enables inverting the sine
component to operate a positive or negative, lower or upper SSB upconversion
(see register TXCFG in Table 23).
When using NCO, the frequency can be set over 40 bits by five registers, FREQNCO_B0
to FREQNCO_B4 (see Table 25).
The frequency is calculated with Equation 4.
Where:
The default settings are:
Registers PHINCO_LSB and PHINCO_MSB over 16 bits from 0 to 360 (see Table 31)
can set the phase of the NCO.
Fig 20. SSBM principle
f
NCO
M is the two’s complement coding representation of FREQ_NCO[39:0]
f
f
f
s
NCO
s
is the DAC clock sampling frequency
= 640 Msps
=
= 96 MHz
M
--------------
2
40
f
s
Rev. 03 — 2 July 2012
Dual 16-bit DAC: up to 1 Gsps; x2, x4 and x8 interpolating
Q
I
cos
cos
sin
sin
+/−
+/−
+/−
001aan575
A
B
DAC1617D1G0
© IDT 2012. All rights reserved.
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