DAC1617D1G0HN IDT [Integrated Device Technology], DAC1617D1G0HN Datasheet - Page 60

• Manufacturer Part Number: DAC1617D1G0HN
• Description: Dual 16-bit DAC, LVDS interface, up to 1 Gsps, x2, x4 and x8 interpolating
• Manufacturer: IDT [Integrated Device Technology]

Integrated Device Technology
Table 44.
Default values are shown highlighted.
Table 45.
Default values are shown highlighted.
DAC1617D1G0 3
Preliminary data sheet
Address
0Ah
Bit
3
2 to 0 INTR_MON_DCLK_RANGE
Symbol
INTR_CTRL
MDS status registers (address 09h to 0Ah) bit description
Interrupt control register (address 0Bh) bit description
Register
MDS_STATUS1
Bit
5
4 to 3
2
1
0
Access
R/W
R/W
Symbol
ADD_ERR
MDS_EN_PHASE[1:0]
MDS_PRERUN
MDS_LOCKOUT
MDS_LOCK
Value
0
1
00
01
10
11
Rev. 03 — 2 July 2012
Dual 16-bit DAC: up to 1 Gsps; x2, x4 and x8 interpolating
Description
internal interrupt and flags clearance
Interrupt condition as related to the DCLK monitoring
disabled
enabled
mon_dclk_flag when mon_dclk drifts to (1 or 5)
(detect small drift)
mon_dclk_flag when mon_dclk drifts to (2 or 4)
(detect large drift)
mon_dclk_flag when mon_dclk drifts to (3)
(detect maximum drift)
mon_dclk_flag disabled
Access Value Description
R
R
R
R
R
…continued
0
1
00
01
10
11
0
1
0
1
0
1
adjustment delay error detection
MDS enable phase
MDS-PRERUN phase active flag
MDS_LOCKOUT detected flag
MDS_LOCK flag
OK
delay offset cannot be applied in
available range
enable phase = 0
enable phase = 1 (only for 2)
enable phase = 2
(only for 2 and 4)
enable phase = 3 (only for 2)
false
true
false
true
false
true
DAC1617D1G0
© IDT 2012. All rights reserved.
60 of 78