DAC1617D1G0HN IDT [Integrated Device Technology], DAC1617D1G0HN Datasheet - Page 71

• Manufacturer Part Number: DAC1617D1G0HN
• Description: Dual 16-bit DAC, LVDS interface, up to 1 Gsps, x2, x4 and x8 interpolating
• Manufacturer: IDT [Integrated Device Technology]

Integrated Device Technology
Table 65.
Default values are shown highlighted.
DAC1617D1G0 3
Preliminary data sheet
Bit
7
6 to 5
4
3 to 2
1 to 0
Symbol
DAC
FRONTEND
DUAL
DSP
BIT_RES
Register TYPE_ID (address 1Bh)
Table 64.
Default values are shown highlighted.
IO_SELECT1[9:0]
00 0000 0000
01 0000 nnnn
10 0000 1111
10 0001 1111
10 0010 1111
10 0011 1111
11 1100 0000
11 1100 0001
11 1111 1110
11 1111 1111
Register IO_MUX1 and IO_MUX2 (address 11h and 12h)
Access
R
R
R
R
R
Rev. 03 — 2 July 2012
Dual 16-bit DAC: up to 1 Gsps; x2, x4 and x8 interpolating
Value
0
1
01
0
11
10
01
00
00
01
10
11
Signal on pin IO1
dclk
Ldout_B<nnnn>
AND (Ldout_B bits)
OR (Ldout_B bits)
AND (Ldout_A bits)
OR (Ldout_A bits)
INTR
INTR
0
1
Description
calibration
LVDS input interface
dual DAC
internal digital signal processing
DAC bit resolution
uncalibrated device
calibrated device
interpolation filter + SSBM
SSBM
interpolation filter
none
16 bits
14 bits
12 bits
10 bits
DAC1617D1G0
Description
internal dclk clock (f
frequency)
internal LVDS data bit of
channel B (<nnnn> = 15 to 0;
enabling the selection bit
number to be observed)
AND result of the 16 LVDS data
bits of channel B
OR result of the 16 LVDS data
bits of channel B
AND result of the 16 LVDS data
bits of channel A
OR result of the 16 LVDS data
bits of channel A
active low interrupt signal
active high interrupt signal
set the general-purpose IO to
low level
set the general-purpose IO to
high level
© IDT 2012. All rights reserved.
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