DAC1617D1G0HN IDT [Integrated Device Technology], DAC1617D1G0HN Datasheet - Page 36

• Manufacturer Part Number: DAC1617D1G0HN
• Description: Dual 16-bit DAC, LVDS interface, up to 1 Gsps, x2, x4 and x8 interpolating
• Manufacturer: IDT [Integrated Device Technology]

Integrated Device Technology
DAC1617D1G0 3
Preliminary data sheet
10.14 DAC transfer function
The full-scale output current for each DAC is the sum of the two complementary current
outputs:
The output current of DAC A depends on the digital input data. Bits DAC_A_DGAIN[11:0]
of register DAC_A_DGAIN_LSB (see Table 27) define the gain factor.
The output current of DAC B depends on the digital input data. Bits DAC_B_DGAIN[11:0]
of register DAC_B_DGAIN_LSB (see Table 27) define the gain factor.
It is possible to define if the DAC1617D1G0 operates with a binary input or a
two's complement input (bit CODING; see Table 22).
Table 17 shows the output current as a function of the input data, when
I
Table 17.
I
I
I
I
Data
0
...
32768
...
65535
OA(fs)
IOUTAP
IOUTAN
IOUTBP
IOUTBN
•
•
•
All slave devices use the MDS signals for the fine alignment. Any misalignment
between these signals causes misalignment on the output. Minimize the delay
between the different MDS signals to avoid misalignments:
– In All slave mode: Use a low skew buffer on the FPGA to generate this signal. Use
– In Master/slave mode: Minimize the MDS PCB length between the master and the
I
I
OA fs
OB fs 
= I
the same PCB length for all MDS signal trace distributions.
slave (or compensate the introduced MDS PCB delay manually).
 

OB(fs)
=
=
=
=
I15 to I0/Q15 to Q0
(binary coding)
0000 0000 0000 0000
...
1000 0000 0000 0000
...
1111 1111 1111 1111

DAC transfer function
I
I
=
I
I
OA fs
OB fs
=
OA fs
OB fs
I
= 20 mA.
IOUTAP
I
 
 
 
 
IOUTBP





---------------------------------------- -



---------------------------------------- -


DACADGAIN
DACBDGAIN
1
1
+
–
–
+
I
Rev. 03 — 2 July 2012

---------------------------------------- -

---------------------------------------- -
IOUTAN
I
DACADGAIN
DACBDGAIN
1024
1024
IOUTBN
Dual 16-bit DAC: up to 1 Gsps; x2, x4 and x8 interpolating
1024
1024
I15 to I0/Q15 to Q0
(two’s complement
coding
1000 0000 0000 0000
...
0000 0000 0000 0000
...
0111 1111 1111 1111








DATA
--------------- -
DATA
--------------- -
65535

65535







DATA
--------------- -
DATA
--------------- -
65535
65535












IOUTAP/IOUTBP
0 mA
...
10 mA
...
20 mA
DAC1617D1G0
IOUTAN/IOUTBN
20 mA
....
10 mA
...
0 mA
© IDT 2012. All rights reserved.
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