DAC1617D1G0HN IDT [Integrated Device Technology], DAC1617D1G0HN Datasheet - Page 57

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DAC1617D1G0HN

Manufacturer Part Number
DAC1617D1G0HN
Description
Dual 16-bit DAC, LVDS interface, up to 1 Gsps, x2, x4 and x8 interpolating
Manufacturer
IDT [Integrated Device Technology]
Datasheet
Integrated Device Technology
Table 36.
Default values are shown highlighted.
Table 37.
Legend: * reset value; <= mandatory value
Table 38.
Default values are shown highlighted.
DAC1617D1G0 3
Preliminary data sheet
Bit
7 to 6
5
4
3
2
1
0
Address
01h
02h
Bit
4
Symbol
MDS_EQCHECK[1:0]
MDS_RUN
MDS_NCO
MDS_NCO_PULSE
MDS_SREF_DIS
MDS_MASTER
MDS_ENA
Symbol
MDS_EVAL_ENA
MDS_MAIN register (address 00h) bit description
MDS window time registers (address 01h to 02h) bit description
MDS_MISCCNTRL0 register (address 03h) bit description
Register
MDS_WIN_PERIOD_A
MDS_WIN_PERIOD_B
10.22.6 Page 1 bit definition detailed description
The tables in this section contain detailed descriptions of the page 1 registers.
Bit
7 to 0
7 to 0
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Access
R/W
Symbol
MDS_WIN_
PERIOD_A[7:0]
MDS_WIN_
PERIOD_B[7:0]
Rev. 03 — 2 July 2012
Dual 16-bit DAC: up to 1 Gsps; x2, x4 and x8 interpolating
Value
00
01
10
11
0
1
0
1
0
1
0
1
0
1
0
1
Value
0
1
Access Value Description
R/W
R/W
Description
lock mode
evaluation process restart control
NCO synchronization
NCO pulse
internal pulse generation
MDS mode selection
MDS function control
Description
MDS evaluation
lock when (early = 1 and late = 1)
lock when (early = 1, late = 1 and equal = 1)
lock when equal = 1
force lock (equal-check = 1)
no action
(0  1) transition restarts evaluation_counter
no action
enable
no action
manual control NCO tuning
normal mode
disable
slave mode
master mode
disable
enable
disable
enable
-
-
determines MDS window LOW time
determines MDS window HIGH time
DAC1617D1G0
© IDT 2012. All rights reserved.
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