DAC1617D1G0HN IDT [Integrated Device Technology], DAC1617D1G0HN Datasheet - Page 37

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DAC1617D1G0HN

Manufacturer Part Number
DAC1617D1G0HN
Description
Dual 16-bit DAC, LVDS interface, up to 1 Gsps, x2, x4 and x8 interpolating
Manufacturer
IDT [Integrated Device Technology]
Datasheet
Integrated Device Technology
DAC1617D1G0 3
Preliminary data sheet
10.15.1 Regulation
10.15.2 Full-scale current adjustment
10.15 Full-scale current
The DAC1617D1G0 reference circuitry integrates an internal band gap reference voltage
which delivers a 1.25 V reference on the GAPOUT pin. Decouple pin GAPOUT using a
100 nF capacitor.
The reference current is generated via an external resistor of 910  (1 %) connected to
VIRES. A control amplifier sets the appropriate full-scale current (I
both DACs (see Figure 27)).
Figure 27 shows the optimal configuration for temperature drift compensation because the
band gap reference voltage can be matched to the voltage across the feedback resistor.
Applying an external reference voltage to the non-inverting input pin GAPOUT and
disabling the internal band gap reference voltage (bit GAP_PON of the COMMON
register; see Table 22) also adjust the DAC current.
The default full-scale current (I
8.1 mA to 34 mA, can be made to both DACs independently using the serial interface.
The settings applied to DAC_A_GAIN[9:0] (registers 17h and 18h; see Table 32) define
the full-scale current of DAC A:
The DAC_B_GAIN[9:0] (registers 19h and 1Ah; see Table 32;) define the full-scale current
of DAC B:
I
I
O fs
O fs
Fig 27. Internal reference configuration
 
 
A
A
=
=
8100
8100
+
+
DAC_A_GAIN[9:0]
DAC_B_GAIN[9:0]
Rev. 03 — 2 July 2012
Dual 16-bit DAC: up to 1 Gsps; x2, x4 and x8 interpolating
O(fs)
) is 20 mA. However, further adjustments, ranging from
25.3
25.3
DAC1617D1G0
OA(fs)
and I
© IDT 2012. All rights reserved.
OB(fs)
) for
37 of 78
(10)
(11)

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