DAC1617D1G0HN IDT [Integrated Device Technology], DAC1617D1G0HN Datasheet - Page 53

• Manufacturer Part Number: DAC1617D1G0HN
• Description: Dual 16-bit DAC, LVDS interface, up to 1 Gsps, x2, x4 and x8 interpolating
• Manufacturer: IDT [Integrated Device Technology]

Integrated Device Technology
Table 28.
Default values are shown highlighted.
Table 29.
Default values are shown highlighted.
Table 30.
Default values are shown highlighted.
Table 31.
Default values are shown highlighted.
DAC1617D1G0 3
Preliminary data sheet
Bit
2
1
0
Bit
7 to 0
Address Register
11h
12h
13h
14h
Address
15h
16h
Symbol
B_DGAIN_E
MINUS_3DB
CLIPPING_ENA
Symbol
CLIPPING_LEVEL[7:0]
DAC_A_OFFSET_LSB 7 to 0
DAC_A_OFFSET_MSB 7 to 0
DAC_B_OFFSET_LSB 7 to 0
DAC_B_OFFSET_MSB 7 to 0
Register DAC_OUT_CTRL (address 0Fh)
Register DAC_CLIPPING (address 10h)
Digital offset value registers (address 11h to 14h) bit description
NCO phase offset registers (address 15h to 16h) bit description
Register
PHINCO_LSB
PHINCO_MSB
Bit
7 to 0
7 to 0
Bit
Symbol
PH_NCO[7:0]
PH_NCO[15:8]
Access
R/W
R/W
R/W
Access
R/W
Symbol
DAC_A_OFFSET[15:8]
DAC_B_OFFSET[7:0]
DAC_B_OFFSET[15:8]
DAC_A_OFFSET[7:0]
Rev. 03 — 2 July 2012
Dual 16-bit DAC: up to 1 Gsps; x2, x4 and x8 interpolating
…continued
Value
0
1
0
1
0
1
Value
-
Access Value Description
R/W
R/W
-
-
Description
DAC B digital gain control
DAC attenuation control
Digital DAC output clipping control
Description
Digital DAC output clipping level value
Access Value
R/W
R/W
disable
enable
unity gain
3 dB gain
disable
enable
NCO phase offset LSB
NCO phase offset MSB
least significant 8 bits for the NCO phase
setting
most significant 8 bits for the NCO phase
setting
-
-
-
-
DAC1617D1G0
Description
DAC A digital offset value
DAC B digital offset value
least significant 8 bits for the
DAC A digital offset
most significant 8 bits for the
DAC A digital offset
least significant 8 bits for the
DAC B digital offset
most significant 8 bits for the
DAC B digital offset
© IDT 2012. All rights reserved.
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