MC68HC05P1ADW FREESCALE [Freescale Semiconductor, Inc], MC68HC05P1ADW Datasheet
MC68HC05P1ADW
Related parts for MC68HC05P1ADW
MC68HC05P1ADW Summary of contents
Page 1
Freescale Semiconductor MC68HC05P1A MC68HCL05P1A MC68HSC05P1A General Release Specification © Freescale Semiconductor, Inc., 2004. All rights reserved. February 25, 1997 © Freescale Semiconductor, Inc., 2004. All rights reserved. CSIC MCU Design Center HC05P1AGRS/D REV. 3.0 Austin, Texas ...
Page 2
Freescale Semiconductor, Inc. General Release Specification For More Information On This Product, Go to: www.freescale.com MC68HC05P1A Rev. 3.0 — ...
Page 3
Freescale Semiconductor, Inc. General Release Specification — MC68HC05P1A Section 1. General Description . . . . . . . . . . . . . . . . . . . 15 Section 2. Memory . . . . . ...
Page 4
Freescale Semiconductor, Inc. List of Sections General Release Specification For More Information On This Product, List of Sections Go to: www.freescale.com MC68HC05P1A Rev. 3.0 — ...
Page 5
Freescale Semiconductor, Inc. General Release Specification — MC68HC05P1A 1.1 1.2 1.3 1.4 1.5 1.5.1 1.5.2 1.5.2.1 1.5.2.2 1.5.2.3 1.5.2.4 1.6 1.6.1 1.6.2 1.6.3 1.6.4 1.6.5 1.6.6 2.1 2.2 2.3 2.4 2.5 2.6 MC68HC05P1A Rev. 3.0 — For More Information On ...
Page 6
Freescale Semiconductor, Inc. Table of Contents 3.1 3.2 3.3 3.3.1 3.3.2 3.3.3 3.3.4 3.3.5 4.1 4.2 4.3 4.4 4.5 4.5.1 4.5.2 4.5.3 4.5.4 4.5.5 5.1 5.2 5.3 5.4 5.4.1 5.4.2 6.1 6.2 6.3 General Release Specification For More Information On ...
Page 7
Freescale Semiconductor, Inc. 6.4 6.4.1 6.4.1.1 6.4.1.2 6.4.2 6.5 7.1 7.2 7.3 7.4 7.5 7.6 7.7 8.1 8.2 8.3 8.4 8.5 8.6 8.7 8.8 8.9 9.1 9.2 9.3 9.3.1 9.3.2 9.3.3 MC68HC05P1A Rev. 3.0 — For More Information On This ...
Page 8
Freescale Semiconductor, Inc. Table of Contents 9.3.4 9.3.5 9.3.6 9.3.7 9.3.8 9.4 9.4.1 9.4.2 9.4.3 9.4.4 9.4.5 9.5 9.6 10.1 10.2 10.3 10.4 10.5 10.6 10.7 10.8 10.9 10.10 3.3 Volt Control Timing . . . . . . . ...
Page 9
Freescale Semiconductor, Inc. 12.1 12.2 12.3 12.4 12.5 12.6 12.7 A.1 A.2 A.3 A.4 B.1 B.2 B.3 B.4 B.5 MC68HC05P1A Rev. 3.0 — For More Information On This Product, Section 12. Ordering Information Contents . . . . . . ...
Page 10
Freescale Semiconductor, Inc. Table of Contents General Release Specification For More Information On This Product, Table of Contents Go to: www.freescale.com MC68HC05P1A Rev. 3.0 — ...
Page 11
Freescale Semiconductor, Inc. General Release Specification — MC68HC05P1A Figure 1-1 1-2 1-3 1-4 1-5 2-1 2-2 2-3 3-1 3-2 4-1 4-2 5-1 5-2 6-1 7-1 7-2 7-3 7-4 MC68HC05P1A Rev. 3.0 — For More Information On This Product, Title MC68HC05P1A ...
Page 12
Freescale Semiconductor, Inc. List of Figures Figure 8-1 8-2 8-3 8-4 8-5 8-6 8-7 8-8 8-9 8-10 8-11 8-12 10-1 10-2 10-3 10-4 10-5 10-6 10-7 A-1 A-2 General Release Specification For More Information On This Product, Title 16-Bit Timer ...
Page 13
Freescale Semiconductor, Inc. General Release Specification — MC68HC05P1A Table Title 4-1 6-1 6-2 7-1 7-2 7-3 7-4 9-1 9-2 9-3 9-4 9-5 9-6 9-7 12-1 A-1 A-2 A-3 A-4 B-1 B-2 B-3 B-4 MC68HC05P1A Rev. 3.0 — For More Information ...
Page 14
Freescale Semiconductor, Inc. List of Tables General Release Specification For More Information On This Product, List of Tables Go to: www.freescale.com MC68HC05P1A Rev. 3.0 — ...
Page 15
Freescale Semiconductor, Inc. General Release Specification — MC68HC05P1A 1.1 Contents 1.2 1.3 1.4 1.5 1.5.1 1.5.2 1.5.2.1 1.5.2.2 1.5.2.3 1.5.2.4 1.6 1.6.1 1.6.2 1.6.3 1.6.4 1.6.5 1.6.6 1.2 Introduction The Freescale MC68HC05P1A microcontroller unit (MCU) is pin compatible with the ...
Page 16
Freescale Semiconductor, Inc. General Description 1.3 Features Features of the MC68HC05P1A include: • • • • • • • • • • • • NOTE: A line over a signal name indicates an active low signal. For example, RESET is ...
Page 17
Freescale Semiconductor, Inc. (27) OSC 1 OSC 2 (26) OSC 2 16-BIT TIMER 1 INPUT CAPTURE (25) PD7/TCAP 1 OUTPUT COMPARE PORT D LOGIC (24)TCMP (23) PD5 CPU CONTROL (1) RESET MC68HC05 CPU (2) IRQ CPU REGISTERS ...
Page 18
Freescale Semiconductor, Inc. General Description 1.4 Mask Options The MC68HC05P1A has 12 mask options. The default state of these mask options and their alternate states are: 1. IRQ is Edge- and Level-Sensitive — Option for Edge-Sensitive 2. Crystal/Ceramic Resonator Oscillator ...
Page 19
Freescale Semiconductor, Inc. MC68HC05P1A Rev. 3.0 — For More Information On This Product, RESET 1 28 IRQ 2 27 PA7 3 26 PA6 4 25 PA5 PA4 6 PA3 7 22 PA2 8 21 PA1 9 20 ...
Page 20
Freescale Semiconductor, Inc. General Description 1.5.2 OSC1 and OSC2 The OSC1 and OSC2 pins are the control connections for the on-chip oscillator. The OSC1 and OSC2 pins can accept crystal, as shown ceramic resonator, as ...
Page 21
Freescale Semiconductor, Inc. NOTE: The frequency two to produce the internal PH2 bus clock operating frequency, f 1.5.2.1 Crystal The circuit in cut, parallel resonant crystal. Follow the crystal manufacturer’s recommendations, as the crystal parameters determine the external ...
Page 22
Freescale Semiconductor, Inc. General Description General Release Specification For More Information On This Product, General Description Go to: www.freescale.com MC68HC05P1A Rev. 3.0 — ...
Page 23
Freescale Semiconductor, Inc. 1.6 RESET Driving this input low will reset the MCU to a known startup state. The RESET pin contains an internal Schmitt trigger to improve its noise immunity. Refer to 1.6.1 PA0–PA7 These eight I/O pins comprise ...
Page 24
Freescale Semiconductor, Inc. General Description 1.6.5 TCMP This pin is the output from the 16-bit timer’s output compare function low after reset. Refer to 1.6.6 IRQ (Maskable Interrupt Request) This input pin drives the asynchronous interrupt function of ...
Page 25
Freescale Semiconductor, Inc. General Release Specification — MC68HC05P1A 2.1 Introduction 2.2 2.3 2.4 2.5 2.6 2.2 Introduction The MC68HC05P1A utilizes 13 address lines to access an internal memory space covering 8 Kbytes. This memory space is divided into I/O, RAM, ...
Page 26
Freescale Semiconductor, Inc. Memory $0000 I/O 32 BYTES $001F $0020 USER ROM 48 BYTES $004F $0050 UNUSED 48 BYTES $007F $0080 INTERNAL RAM 128 BYTES $00BF STACK $00C0 64 BYTES $00FF $0100 USER ROM 2048 BYTES $08FF $0900 UNUSED 5632 ...
Page 27
Freescale Semiconductor, Inc. Addr. Register Name $0000 Port A Data (PORTA) $0001 Port B Data (PORTB) $0002 Port C Data (PORTC) $0003 Port D Data (PORTD) $0004 Port A Data Direction (DDRA) $0005 Port B Data Direction (DDRB) $0006 Port ...
Page 28
Freescale Semiconductor, Inc. Memory Addr. Register Name $000D Unimplemented $000E Unimplemented $000F Unimplemented Figure 2-2. I/O and Control Registers $0000–$000F (Continued) Addr. Register Name $010D Unimplemented $0011 Unimplemented $0012 Timer Control Register (TCR) $0013 Timer Status Register (TSR) $0014 Input ...
Page 29
Freescale Semiconductor, Inc. Addr. Register Name $0017 Output Compare MSB (OCRL) $0018 Timer MSB (TIMRH) $0019 Timer LSB (TMRL) $001A Alternate Counter MSB (ACRH) $001B Alternate Counter LSB (ACRL) $001C Unimplemented $001D Unimplemented $001E Unimplemented $001F Reserved Figure 2-3. I/O ...
Page 30
Freescale Semiconductor, Inc. Memory 2.5 Random-Access Memory (RAM) The user RAM consists of 128 bytes (including the stack) at locations $0080–$00FF. The stack begins at address $00FF. The stack pointer can access 64 bytes of RAM from $00FF to $00C0. ...
Page 31
Freescale Semiconductor, Inc. General Release Specification — MC68HC05P1A 3.1 Contents 3.2 3.3 3.3.1 3.3.2 3.3.3 3.3.4 3.3.5 3.2 Introduction This section describes the registers of the M68HC05 central processor unit (CPU). The stop and wait modes, initiated by software instructions, ...
Page 32
Freescale Semiconductor, Inc. CPU Core Figure 3-2 General Release Specification For More Information On This Product, CPU CONTROL M68HC05 CPU CPU REGISTERS PROGRAM COUNTER CONDITION CODE REGISTER 1 Figure 3-1. CPU ...
Page 33
Freescale Semiconductor, Inc. 3.3.1 Accumulator The accumulator ( general-purpose 8-bit register used to hold operands and results of arithmetic calculations or data manipulations. 3.3.2 Index Register The index register ( 8-bit register used for the indexed ...
Page 34
Freescale Semiconductor, Inc. CPU Core and loses the previously stored information. A subroutine call occupies two locations on the stack; an interrupt uses five locations. 3.3.4 Program Counter The program counter (PC 13-bit register that contains the address ...
Page 35
Freescale Semiconductor, Inc. I — Interrupt When this bit is set, the timer and external interrupt are masked (disabled interrupt occurs while this bit is set, the interrupt is latched and processed as soon as the I bit ...
Page 36
Freescale Semiconductor, Inc. CPU Core General Release Specification For More Information On This Product, CPU Core Go to: www.freescale.com MC68HC05P1A Rev. 3.0 — ...
Page 37
Freescale Semiconductor, Inc. General Release Specification — MC68HC05P1A 4.1 Contents 4.2 4.3 4.4 4.5 4.5.1 4.5.2 4.5.3 4.5.4 4.5.5 4.2 Introduction The MCU can be interrupted by: 1. Non-maskable Software Interrupt Instruction (SWI) 2. External Asynchronous Interrupt (IRQ) 3. Optional ...
Page 38
Freescale Semiconductor, Inc. Interrupts When the current instruction is completed, the processor checks all pending hardware interrupts. If interrupts are not masked by the I bit being clear in the condition code register (CCR) and the corresponding interrupt enable bit ...
Page 39
Freescale Semiconductor, Inc. 4.3 Reset Interrupt Sequence The reset function is not in the strictest sense an interrupt; however acted upon in a similar manner, as shown in on the RESET pin or internally generated RST signal causes ...
Page 40
Freescale Semiconductor, Inc. Interrupts Y NOTE: The internal interrupt latch is cleared nine PH2 clock cycles after the interrupt is recognized (after location $1FFA is read). Therefore, another external interrupt pulse can be latched during the IRQ service routine. General ...
Page 41
Freescale Semiconductor, Inc. IRQ PIN PA0 DDRA0 PA0 IRQ INHIBIT (MASK OPTION) PA7 DDRA7 PA7 IRQ INHIBIT (MASK OPTION) RST IRQ VECTOR FETCH MASK OPTION (IRQ LEVEL) Figure 4-2. IRQ Function Block Diagram NOTE: When the edge- and level-sensitive mask ...
Page 42
Freescale Semiconductor, Inc. Interrupts If level sensitivity is chosen, the active high state of the IRQ input can also activate an IRQ request to the CPU to generate the IRQ interrupt sequence. This makes the IRQ interrupt sensitive to the ...
Page 43
Freescale Semiconductor, Inc. be enabled. The interrupt service routine address is specified by the contents of memory locations $1FF8 and $1FF9. 4.5.4 Output Compare Interrupt The output compare interrupt is generated by the 16-bit timer as described in is located ...
Page 44
Freescale Semiconductor, Inc. Interrupts General Release Specification For More Information On This Product, Interrupts Go to: www.freescale.com MC68HC05P1A Rev. 3.0 — ...
Page 45
Freescale Semiconductor, Inc. General Release Specification — MC68HC05P1A 5.1 Contents 5.2 5.3 5.4 5.4.1 5.4.2 5.2 Introduction The MCU can be reset from three sources: one external input and two internal reset conditions. The RESET pin is an input with ...
Page 46
Freescale Semiconductor, Inc. Resets 5.3 External Reset (RESET) The reset input is the only external reset and is connected to an internal Schmitt trigger. The external reset occurs whenever the reset input is driven below the lower threshold and remains ...
Page 47
Freescale Semiconductor, Inc. this location returns the MSB of the unimplemented user interrupt vector. Writing a logic 0 to this location clears the COP watchdog timer. Addr. Register Name Unimplemented Vector $1FF0 and COP Watchdog Timer Figure 5-2. COP Watchdog ...
Page 48
Freescale Semiconductor, Inc. Resets General Release Specification For More Information On This Product, Resets Go to: www.freescale.com MC68HC05P1A Rev. 3.0 — ...
Page 49
Freescale Semiconductor, Inc. General Release Specification — MC68HC05P1A 6.1 Contents 6.2 6.3 6.4 6.4.1 6.4.1.1 6.4.1.2 6.4.2 6.5 6.2 Introduction The MC68HC05P1A uses single-chip mode. The conditions required to enter this mode are shown in determined by the voltages on ...
Page 50
Freescale Semiconductor, Inc. Operating Modes exceeds V last rising edge on RESET is stored in a latch and used to determine the mode of operation when the COP watchdog timer resets the MCU. 6.3 Single-Chip Mode The single-chip mode allows ...
Page 51
Freescale Semiconductor, Inc. 6.5.0.1 Stop Mode Execution of the STOP instruction without conversion to halt places the MCU in its lowest-power consumption mode. In stop mode, the internal oscillator is turned off, halting all internal processing, including the COP watchdog ...
Page 52
Freescale Semiconductor, Inc. Operating Modes This varied delay time is the result of the halt mode exit circuitry testing the oscillator stabilization delay timer (a feature of stop mode), which has been free-running (a feature of wait mode). NOTE: Halt ...
Page 53
Freescale Semiconductor, Inc. STOP STOP Y TO HALT MASK OPTION? N STOP EXTERNAL OSCILLATOR, STOP INTERNAL TIMER CLOCK, RESET STARTUP DELAY STOP INTERNAL PROCESSOR CLOCK, CLEAR I-BIT IN CCR Y EXTERNAL RESET EXTERNAL INTERRUPT? RESTART EXTERNAL OSCILLATOR, N ...
Page 54
Freescale Semiconductor, Inc. Operating Modes 6.6 COP Watchdog Timer Considerations The COP watchdog timer is active in single-chip mode of operation when selected by mask option. Executing the STOP instruction without conversion to halt (via mask option) will cause the ...
Page 55
Freescale Semiconductor, Inc. General Release Specification — MC68HC05P1A 7.1 Contents 7.2 7.3 7.4 7.5 7.6 7.7 7.2 Introduction In the single-chip mode, 20 bidirectional input/output (I/O) lines are arranged as two 8-bit I/O ports (ports A and C), one 3-bit ...
Page 56
Freescale Semiconductor, Inc. Input/Output Ports 7.3 Port A Port 8-bit bidirectional port, which can share its pins with the interrupt system as shown in the corresponding bits in a data direction register and a data register. The ...
Page 57
Freescale Semiconductor, Inc. 7.4 Port B Port 3-bit bidirectional port that does not share any of its pins with other subsystems. The port B data register is located at address $0001 and its data direction register (DDR) ...
Page 58
Freescale Semiconductor, Inc. Input/Output Ports 7.5 Port C Port 8-bit bidirectional port that does not share any of its pins with other subsystems. The port C data register is located at address $0002, and its data direction ...
Page 59
Freescale Semiconductor, Inc. 7.6 Port D Port 2-bit port with one bidirectional pin (PD5) and one input-only pin (PD7). Pin PD7 is shared with the 16-bit timer. The port D data register is located at address $0003 ...
Page 60
Freescale Semiconductor, Inc. Input/Output Ports 7.7 I/O Port Programming Each pin on ports A through D (except pin 7 of port D) may be programmed as an input or an output under software control as shown in Table is determined ...
Page 61
Freescale Semiconductor, Inc. DDRD *Does not affect input, but stored to data register, PD7 is input-only NOTE: To avoid generating a glitch on an I/O port pin, data should be written to the I/O port data register before writing a ...
Page 62
Freescale Semiconductor, Inc. Input/Output Ports General Release Specification For More Information On This Product, Input/Output Ports Go to: www.freescale.com MC68HC05P1A Rev. 3.0 — ...
Page 63
Freescale Semiconductor, Inc. General Release Specification — MC68HC05P1A 8.1 Contents 8.2 8.3 8.4 8.5 8.6 8.7 8.8 8.9 8.2 Introduction The MC68HC05P1A MCU contains a single 16-bit programmable timer with an input capture function and an output compare function. The ...
Page 64
Freescale Semiconductor, Inc. 16-Bit Timer OUTPUT COMPARE OCRH OCRL COMPARE DETECTOR TIMER STATUS OCF REGISTER Figure 8-1. 16-Bit Timer Block Diagram General Release Specification For More Information On This Product, INTERNAL HC05 BUS BUFFER PH2 CLOCK FREE- RUNNING COUNTER TMRH ...
Page 65
Freescale Semiconductor, Inc. NOTE: The I bit in the condition code register (CCR) should be set while manipulating both the high and low byte registers of a specific timer function. This prevents interrupts from occurring between the time that the ...
Page 66
Freescale Semiconductor, Inc. 16-Bit Timer TMRH Read: TMRH7 Write: Reset: TMRL Read: Write: Reset: ACRH Read: Write: Reset: ACRL Read: Write: Reset: Figure 8-3. Alternate Counter Registers (ACRH/ACRL) General Release Specification For More Information On This Product, $0018 Bit 7 ...
Page 67
Freescale Semiconductor, Inc. PH2 CLOCK 16-BIT FREE- RUNNING $FFFE COUNTER TIMER OVERFLOW FLAG (TOF) NOTE: The TOF bit is set at timer state T11 (transition of counter from $FFFF to $0000 cleared by reading the timer status register ...
Page 68
Freescale Semiconductor, Inc. 16-Bit Timer 8.4 Output Compare The output compare function may be used to generate an output waveform and/ elapsed time indicator. All of the bits in the output compare register pair OCRH/OCRL are readable and ...
Page 69
Freescale Semiconductor, Inc. After a CPU write cycle to the MSB of the output compare register pair (OCRH), the output compare function is inhibited until the LSB (OCRL) is written. Both bytes must be written if the MSB is written. ...
Page 70
Freescale Semiconductor, Inc. 16-Bit Timer Figure 8-7. Output Compare Software Initialization Example PH2 CLOCK 16-BIT FREE- RUNNING $FFEB COUNTER COMPARE ...
Page 71
Freescale Semiconductor, Inc. 8.5 Input Capture Two 8-bit read-only registers (ICRH and ICRL) make up the 16-bit input capture. They are used to latch the value of the free-running counter after a defined transition is sensed by the input capture ...
Page 72
Freescale Semiconductor, Inc. 16-Bit Timer registers always contain the free-running counter value that corresponds to the most recent input capture. After a read of the MSB of the input capture register pair (ICRH), counter transfers are inhibited until the LSB ...
Page 73
Freescale Semiconductor, Inc. 8.6 Timer Control Register The timer control (TCR) and free-running counter (TMRH, TMRL, ACRH, and ACRL) registers are the only registers of the 16-bit timer affected by reset. The output compare port (TCMP) is forced low after ...
Page 74
Freescale Semiconductor, Inc. 16-Bit Timer 8.7 Timer Status Register Reading the timer status register (TSR) satisfies the first condition required to clear status flags and interrupts. The only remaining step is to read (or write) the register associated with the ...
Page 75
Freescale Semiconductor, Inc. OCF — Output Compare Flag Bit 6 is set when the contents of the output compare registers match the contents of the free-running counter. This flag and the output compare interrupt can be cleared by reading register ...
Page 76
Freescale Semiconductor, Inc. 16-Bit Timer General Release Specification For More Information On This Product, 16-Bit Timer Go to: www.freescale.com MC68HC05P1A Rev. 3.0 — ...
Page 77
Freescale Semiconductor, Inc. General Release Specification — MC68HC05P1A 9.1 Contents 9.2 9.3 9.3.1 9.3.2 9.3.3 9.3.4 9.3.5 9.3.6 9.3.7 9.3.8 9.4 9.4.1 9.4.2 9.4.3 9.4.4 9.4.5 9.5 9.6 MC68HC05P1A Rev. 3.0 — For More Information On This Product, Section 9. ...
Page 78
Freescale Semiconductor, Inc. Instruction Set 9.2 Introduction The MCU instruction set has 62 instructions and uses eight addressing modes. The instructions include all those of the M146805 CMOS Family plus one more: the unsigned multiply (MUL) instruction. The MUL instruction ...
Page 79
Freescale Semiconductor, Inc. 9.3.1 Inherent Inherent instructions are those that have no operand, such as return from interrupt (RTI) and stop (STOP). Some of the inherent instructions act on data in the CPU registers, such as set carry flag (SEC) ...
Page 80
Freescale Semiconductor, Inc. Instruction Set 9.3.5 Indexed, No Offset Indexed instructions with no offset are 1-byte instructions that can access data with variable addresses within the first 256 memory locations. The index register contains the low byte of the effective ...
Page 81
Freescale Semiconductor, Inc. 9.3.8 Relative Relative addressing is only for branch instructions. If the branch condition is true, the CPU finds the effective branch destination by adding the signed byte following the opcode to the contents of the program counter. ...
Page 82
Freescale Semiconductor, Inc. Instruction Set 9.4.1 Register/Memory Instructions These instructions operate on CPU registers and memory locations. Most of them use two operands. One operand is in either the accumulator or the index register. The CPU finds the other operand ...
Page 83
Freescale Semiconductor, Inc. 9.4.2 Read-Modify-Write Instructions These instructions read a memory location or a register, modify its contents, and write the modified value back to the memory location or to the register. NOTE: Do not use read-modify-write operations on write-only ...
Page 84
Freescale Semiconductor, Inc. Instruction Set 9.4.3 Jump/Branch Instructions Jump instructions allow the CPU to interrupt the normal sequence of the program counter. The unconditional jump instruction (JMP) and the jump-to-subroutine instruction (JSR) have no register operand. Branch instructions allow the ...
Page 85
Freescale Semiconductor, Inc. MC68HC05P1A Rev. 3.0 — For More Information On This Product, Table 9-3. Jump and Branch Instructions Instruction Branch if Carry Bit Clear Branch if Carry Bit Set Branch if Equal Branch if Half-Carry Bit Clear Branch if ...
Page 86
Freescale Semiconductor, Inc. Instruction Set 9.4.4 Bit Manipulation Instructions The CPU can set or clear any writable bit in the first 256 bytes of memory, which includes I/O registers and on-chip RAM locations. The CPU can also test and branch ...
Page 87
Freescale Semiconductor, Inc. 9.4.5 Control Instructions These instructions act on CPU registers and control CPU operation during program execution. MC68HC05P1A Rev. 3.0 — For More Information On This Product, Table 9-5. Control Instructions Instruction Clear Carry Bit Clear Interrupt Mask ...
Page 88
Freescale Semiconductor, Inc. Instruction Set 9.5 Instruction Set Summary Table 9-6. Instruction Set Summary Source Operation Form ADC # opr ADC opr ADC opr Add with Carry ADC opr ,X ADC opr ,X ADC ,X ADD # opr ADD opr ...
Page 89
Freescale Semiconductor, Inc. Table 9-6. Instruction Set Summary (Continued) Source Operation Form BIH rel Branch if IRQ Pin High BIL rel Branch if IRQ Pin Low BIT # opr BIT opr BIT opr Bit Test Accumulator with Memory Byte BIT ...
Page 90
Freescale Semiconductor, Inc. Instruction Set Table 9-6. Instruction Set Summary (Continued) Source Operation Form CLR opr CLRA CLRX Clear Byte CLR opr ,X CLR ,X CMP # opr CMP opr CMP opr Compare Accumulator with Memory Byte CMP opr ,X ...
Page 91
Freescale Semiconductor, Inc. Table 9-6. Instruction Set Summary (Continued) Source Operation Form JSR opr JSR opr JSR opr ,X Jump to Subroutine JSR opr ,X JSR ,X LDA # opr LDA opr LDA opr Load Accumulator with Memory Byte LDA ...
Page 92
Freescale Semiconductor, Inc. Instruction Set Table 9-6. Instruction Set Summary (Continued) Source Operation Form ROR opr RORA RORX Rotate Byte Right through Carry Bit ROR opr ,X ROR ,X RSP Reset Stack Pointer RTI Return from Interrupt RTS Return from ...
Page 93
Freescale Semiconductor, Inc. Table 9-6. Instruction Set Summary (Continued) Source Operation Form TAX Transfer Accumulator to Index Register TST opr TSTA TSTX Test Memory Byte for Negative or Zero TST opr ,X TST ,X TXA Transfer Index Register to Accumulator ...
Page 94
Freescale Semiconductor, Inc. Instruction Set General Release Specification For More Information On This Product, Instruction Set Go to: www.freescale.com MC68HC05P1A Rev. 3.0 — ...
Page 95
Freescale Semiconductor, Inc. General Release Specification — MC68HC05P1A 10.1 Contents 10.2 10.3 10.4 10.5 10.6 10.7 10.8 10.9 10.10 3.3 Volt Control Timing . . . . . . . . . . . . . . . . . ...
Page 96
Freescale Semiconductor, Inc. Electrical Specifications 10.3 Maximum Ratings Maximum ratings are the extreme limits to which the MCU can be exposed without permanently damaging it. The MCU contains circuitry to protect the inputs against damage from high static voltages; however, ...
Page 97
Freescale Semiconductor, Inc. 10.5 Thermal Characteristics Thermal Resistance PDIP SOIC 10.6 Power Considerations The average chip-junction temperature, T where Ambient temperature INT P I/O For most applications, P The following ...
Page 98
Freescale Semiconductor, Inc. Electrical Specifications 10.7 5.0 Volt DC Electrical Characteristics Characteristic Output Voltage I 10.0 A Load Output High Voltage (I = –0.8 mA) PA0–PA7, PC2–PC7, PB7–PB5, TCMP, Load PD5 (I = –5.0 mA) PC0–PC1 Load Output Low Voltage ...
Page 99
Freescale Semiconductor, Inc. 10.8 3.3 Volt DC Electrical Characteristics Characteristic Output Voltage I 10.0 A Load Output High Voltage (I = –0.2 mA) PA0–PA7, PB5–PB7, PC2–PC7, PD5, Load TCMP (I = –1.5 mA) PC0–PC1 Load Output Low Voltage (I = ...
Page 100
Freescale Semiconductor, Inc. Electrical Specifications 800 mV 700 mV 600 mV 500 mV 400 mV 300 mV 200 mV 100 1.0 mA 2.0 mA 3 NOTES 5.0 V, ...
Page 101
Freescale Semiconductor, Inc. 800 5 700 mV 600 mV 500 mV 400 mV 300 mV 200 mV 100 1.0 mA 2.0 mA 3 NOTES ...
Page 102
Freescale Semiconductor, Inc. Electrical Specifications General Release Specification For More Information On This Product, 4500 A 4000 A 3500 A 3000 A 2500 A 2000 A 1500 A 1000 A 500 A 1 0.5 MHz 1.0 MHz ...
Page 103
Freescale Semiconductor, Inc. 10.9 5.0 Volt Control Timing Characteristic Frequency of Operation Crystal Option External Clock Option Internal Operating Frequency Crystal (f 2) osc External Clock (f 2) osc Cycle Time Crystal Oscillator Startup Time Stop Recovery Startup Time (Crystal ...
Page 104
Freescale Semiconductor, Inc. Electrical Specifications 10.10 3.3 Volt Control Timing Characteristic Frequency of Operation Crystal/Ceramic Resonator (Note 2) RC Oscillator External Clock Option Internal Operating Frequency (f osc Crystal/Ceramic Oscillator RC Oscillator External Clock Cycle Time ( osc ...
Page 105
Freescale Semiconductor, Inc. MC68HC05P1A Rev. 3.0 — For More Information On This Product, Electrical Specifications Go to: www.freescale.com Electrical Specifications 3.3 Volt Control Timing General Release Specification ...
Page 106
Freescale Semiconductor, Inc. Electrical Specifications General Release Specification For More Information On This Product, Electrical Specifications Go to: www.freescale.com MC68HC05P1A Rev. 3.0 — ...
Page 107
Freescale Semiconductor, Inc. General Release Specification — MC68HC05P1A 11.1 Contents 11.2 11.3 11.4 11.2 Introduction This section gives the dimensions of the dual in-line package (DIP) and the small outline integrated circuit (SOIC) package. 11.3 Dual In-Line Package (Case 710) ...
Page 108
Freescale Semiconductor, Inc. Mechanical Specifications 11.4 Small Outline Integrated Circuit (Case 751F) - 28X -T- G 26X General Release Specification For More Information On This Product 14X - -T- ...
Page 109
Freescale Semiconductor, Inc. General Release Specification — MC68HC05P1A 12.1 Contents 12.2 12.3 12.4 12.5 12.6 12.7 12.2 Introduction This section contains instructions for ordering custom-masked ROM MCUs. 12.3 MCU Ordering Forms To initiate an order for a ROM-based MCU, first ...
Page 110
Freescale Semiconductor, Inc. Ordering Information The current MCU ordering form is also available through the Freescale Freeware Bulletin Board Service (BBS). The telephone number is (512) 891-FREE. After making the connection, type bbs in lower-case letters. Then press the return ...
Page 111
Freescale Semiconductor, Inc. NOTE: Begin the application program at the first user ROM location. Program addresses must correspond exactly to the available on-chip user ROM addresses as shown in the memory map. Write $00 in all non-user ROM locations or ...
Page 112
... Small Outline Integrated Circuit (SOIC) General Release Specification For More Information On This Product, shows the MC order numbers for the available package Table 12-1. MC Order Numbers Package Type Temperature + +70 C Ordering Information Go to: www.freescale.com MC Order Number MC68HC05P1AP MC68HC05P1ADW MC68HC05P1A Rev. 3.0 — ...
Page 113
Freescale Semiconductor, Inc. General Release Specification — MC68HC05P1A A.1 Contents A.2 A.3 A.4 A.2 Introduction This appendix introduces the MC68HCL05P1A, a low-power version of the MC68HC05P1A. All of the information in this document applies to the MC68HCL05P1A with the exceptions ...
Page 114
Freescale Semiconductor, Inc. MC68HCL05P1A A.3 DC Electrical Characteristics The data in 10.8 3.3 Volt DC Electrical Characteristics MC68HCL05P1A with the exceptions given in and Table Table A-1. Low-Power Output Voltage (V Characteristic Output High Voltage (I = –0.1 mA) Load ...
Page 115
Freescale Semiconductor, Inc. Table A-3. Low-Power Supply Current Characteristic Supply Current (V = 4.5–5.5 Vdc Run (Note 2) Wait (Note 3) Stop (Note +70 C (Standard) Supply Current (V = 2.5–3.6 Vdc, ...
Page 116
Freescale Semiconductor, Inc. MC68HCL05P1A General Release Specification For More Information On This Product, 1.6 1 2 1 1.2 1.0 0.8 0.6 0.4 0 0.1 0.2 0.3 ...
Page 117
Freescale Semiconductor, Inc. A.4 MC Ordering Information Table A-4 28-Pin Plastic Dual In-Line Package (DIP) 28-Pin Small Outline Integrated Circuit (SOIC) MC68HC05P1A Rev. 3.0 — For More Information On This Product, provides ordering information for available package types. Table A-4. ...
Page 118
Freescale Semiconductor, Inc. MC68HCL05P1A General Release Specification For More Information On This Product, MC68HCL05P1A Go to: www.freescale.com MC68HC05P1A Rev. 3.0 — ...
Page 119
Freescale Semiconductor, Inc. General Release Specification — MC68HC05P1A B.1 Contents B.2 B.3 B.4 B.5 B.2 Introduction This appendix introduces the MC68HSC05P1A, a high-speed version of the MC68HC05P1A. All of the information in this document applies to the MC68HCSC05P1A with the ...
Page 120
Freescale Semiconductor, Inc. MC68HSC05P1A B.3 DC Electrical Characteristics The data in 10.8 3.3 Volt DC Electrical Characteristics MC68HSC05P1A with the exceptions given in Table B-1. High-Speed Supply Current Characteristic Supply Current (V = 4.5–5.5 Vdc Run (Note 3) ...
Page 121
Freescale Semiconductor, Inc. B.4 Control Timing The data in Timing Table B-2 Table B-2. High-Speed Control Timing (V Characteristic Oscillator Frequency Crystal Option External Clock Option Internal Operating Frequency Crystal (f 2) osc External Clock (f 2) osc Internal Clock ...
Page 122
Freescale Semiconductor, Inc. MC68HSC05P1A B.5 MC Ordering Information Table B-4 28-Pin Plastic Dual In-Line Package (DIP) 28-Pin Small Outline Integrated Circuit (SOIC) General Release Specification For More Information On This Product, provides ordering information for available package types. Table B-4. ...
Page 123
Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com ...
Page 124
Freescale Semiconductor, Inc. Home Page: www.freescale.com email: support@freescale.com USA/Europe or Locations Not Listed: Freescale Semiconductor Technical Information Center, CH370 1300 N. Alma School Road Chandler, Arizona 85224 (800) 521-6274 480-768-2130 support@freescale.com Europe, Middle East, and Africa: Freescale Halbleiter Deutschland GmbH ...