MC68HC05P1ADW FREESCALE [Freescale Semiconductor, Inc], MC68HC05P1ADW Datasheet - Page 74

• Manufacturer Part Number: MC68HC05P1ADW
• Description: General Release Specification
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

16-Bit Timer
8.7 Timer Status Register
General Release Specification
Reading the timer status register (TSR) satisfies the first condition
required to clear status flags and interrupts. The only remaining step is
to read (or write) the register associated with the active status flag
(and/or interrupt). This method does not present any problems for input
capture or output compare functions.
However, a problem can occur when using a timer interrupt function and
reading the free-running counter at random times to measure an elapsed
time. If the proper precautions are not designed into the application
software, a timer interrupt flag (TOF) could unintentionally be cleared if:
The alternate counter registers (ACRH and ACRL) contain the same
values as the timer registers (TMRH and TMRL). Registers ACRH and
ACRL can be read at any time without affecting the timer overflow flag
(TOF) or interrupt.
ICF — Input Capture Flag
Reset:
$0013
Read:
Write:
1. The TSR is read when bit 5 (TOF) is set.
2. The LSB of the free-running counter is read, but not for the
Bit 7 is set when the edge specified by IEDG in register TCR has been
sensed by the input capture edge detector fed by pin TCAP. This flag
and the input capture interrupt can be cleared by reading register TSR
followed by reading the LSB of the input capture register pair (ICRL).
Freescale Semiconductor, Inc.
For More Information On This Product,
purpose of servicing the flag or interrupt.
U = Unaffected
Bit 7
ICF
U
Go to: www.freescale.com
Figure 8-12. Timer Status Register (TSR)
OCF
U
6
16-Bit Timer
TOF
U
5
4
0
0
3
0
0
MC68HC05P1A
2
0
0
1
0
0
—
Rev. 3.0
Bit 0
0
0