MC68HC05P1ADW FREESCALE [Freescale Semiconductor, Inc], MC68HC05P1ADW Datasheet - Page 50

• Manufacturer Part Number: MC68HC05P1ADW
• Description: General Release Specification
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Operating Modes
6.3 Single-Chip Mode
6.4 Low-Power Modes
6.5 STOP Instruction
General Release Specification
exceeds V
last rising edge on RESET is stored in a latch and used to determine the
mode of operation when the COP watchdog timer resets the MCU.
The single-chip mode allows the MCU to function as a self-contained
microcontroller with maximum use of the pins for on-chip peripheral
functions. All address and data activity occurs within the MCU and is not
available externally. Single-chip mode is entered on the rising edge of
RESET if the IRQ pin is within the normal operating voltage range. The
pinout for the single-chip mode is shown in
Pinout.
In the single-chip mode, two 8-bit I/O ports, one 3-bit I/O port, and a
1-bit I/O port are shared with the 16-bit timer subsystem. The 16-bit timer
subsystem also has one input-only pin and one output-only pin.
The MC68HC05P1A is capable of running in a low-power mode in each
of its configurations. The WAIT and STOP instructions provide two
modes that reduce the power required for the MCU by stopping various
internal clocks and/or the on-chip oscillator. The STOP and WAIT
instructions are not normally used if the COP watchdog timer is enabled.
The stop conversion mask option is used to modify the behavior of the
STOP instruction from stop mode to halt mode. The flow of the stop, halt,
and wait modes is shown in
The STOP instruction can result in one of two modes of operation,
depending on the stop conversion mask option. If the stop conversion is
not chosen, the STOP instruction will behave like a normal STOP
instruction in the M68HC05 Family and place the MCU in the stop mode.
If the stop conversion is chosen, the STOP instruction will behave like a
WAIT instruction (with the exception of a variable delay at startup) and
place the MCU in halt mode.
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. In this case, the voltage applied to PD7/TCAP during the
Operating Modes
Figure
6-1.
Figure 1-2 . Single-Chip
MC68HC05P1A
—
Rev. 3.0