PIC18F1230 MICROCHIP [Microchip Technology], PIC18F1230 Datasheet - Page 182
PIC18F1230
Manufacturer Part Number
PIC18F1230
Description
18/20/28-Pin, Enhanced Flash Microcontrollers with nanoWatt Technology, High-Performance PWM and A/D
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18F1230.pdf
(312 pages)
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PIC18F1230/1330
The module is enabled by setting the LVDEN bit. Each
time that the LVD module is enabled, the circuitry
requires some time to stabilize. The IRVST bit is a
read-only bit and is used to indicate when the circuit is
stable. The module can only generate an interrupt after
the circuit is stable and IRVST is set.
18.1
When the LVD module is enabled, a comparator uses
an internally generated reference voltage as the set
point. The set point is compared with the trip point,
where each node in the resistor divider represents a
FIGURE 18-1:
DS39758B-page 180
Operation
LVD MODULE BLOCK DIAGRAM
BORENx
LVDEN
V
DD
Advance Information
LVDL3:LVDL0
Internal Voltage
trip point voltage. The “trip point” voltage is the voltage
level at which the device detects a low-voltage event
depending on the configuration of the module. When
the supply voltage is equal to the trip point, the voltage
tapped off of the resistor array is equal to the internal
reference voltage generated by the voltage reference
module. The comparator then generates an interrupt
signal by setting the LVDIF bit.
The trip point voltage is software programmable to any 1 of
15 values. The trip point is selected by programming the
LVDL3:LVDL0 bits (LVDCON<3:0>).
Reference
LVDEN
LVDCON
Register
© 2006 Microchip Technology Inc.
LVDIF
Set
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